Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8094503 | Method of programming an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Jeffrey A. Shields, Kent Hewitt | 2012-01-10 |
| 7817474 | Method for programming and erasing an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Jeffrey A. Shields, Kent Hewitt | 2010-10-19 |
| 7466591 | Method for programming and erasing an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Jeffrey A. Shields, Kent Hewitt | 2008-12-16 |
| 6504191 | Independently programmable memory segments within a PMOS electrically erasable programmable read only memory array achieved by N-well separation and method therefor | Randy Yach, Kent Hewitt, Gianpaolo Spadini | 2003-01-07 |
| 6432773 | Memory cell having an ONO film with an ONO sidewall and method of fabricating same | Neil Deutscher, Robert P. Ma | 2002-08-13 |
| 6300183 | Independently programmable memory segments within a PMOS electrically erasable programmable read only memory array achieved by N-well separation and method therefor | Randy Yach, Kent Hewitt, Gianpaolo Spadini | 2001-10-09 |
| 6236595 | Programming method for a memory cell | Kent Hewitt, Jeffrey A. Shields, David Marc Davies | 2001-05-22 |
| 6222761 | Method for minimizing program disturb in a memory cell | Kent Hewitt, Jeffrey A. Shields | 2001-04-24 |
| 5073230 | Means and methods of lifting and relocating an epitaxial device layer | George N. Maracas, Ronald A. Ruechner | 1991-12-17 |