JW

Jack T. Wong

LS Lattice Semiconductor: 8 patents #58 of 544Top 15%
AM AMD: 6 patents #1,863 of 9,279Top 25%
MI Microchip Technology Incorporated: 4 patents #144 of 958Top 20%
VA Vantis: 2 patents #12 of 24Top 50%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
GP Globalfoundries Singapore Pte.: 1 patents #427 of 828Top 55%
Disney: 1 patents #3,944 of 6,686Top 60%
Overall (All Time): #183,709 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10706905 Single path memory sense amplifier circuit Yentsai Huang, Chunsung Chiang, Wuyang Hao, Lejan Pu 2020-07-07
10699763 Merged write driver based on local source line MRAM architecture Wuyang Hao, Chunsung Chiang 2020-06-30
10050131 Method of forming a polysilicon sidewall oxide region in a memory cell Sajid Kabeer, Mel Hymas, Santosh Murali, Brad Kopp 2018-08-14
9653137 STT-MRAM bitcell for embedded flash applications Kangho Lee, Eng Huat Toh, Elgin Quek 2017-05-16
9455037 EEPROM memory cell with low voltage read path and high voltage erase/write path Kent Hewitt, Bomy Chen, Sonu Daryanani, Jeffrey A. Shields, Daniel A. Alvarez +1 more 2016-09-27
7737723 Transparent field reconfiguration for programmable logic devices Howard Tang, Clark Wilkinson, Jeffrey S. Byrne 2010-06-15
7623391 Data transfer verification systems and methods Kory Gong 2009-11-24
7538574 Transparent field reconfiguration for programmable logic devices Howard Tang, Clark Wilkinson, Jeffrey S. Byrne 2009-05-26
7215139 Upgradeable and reconfigurable programmable logic device Om P. Agrawal, Howard Tang 2007-05-08
7167405 Data transfer verification systems and methods Kory Gong 2007-01-23
7081771 Upgradeable and reconfigurable programmable logic device Om P. Agrawal, Howard Tang 2006-07-25
6933199 Method for integrating non-volatile memory with high-voltage and low-voltage logic in a salicide process Sonu Daryanani 2005-08-23
6919736 Field programmable gate array having embedded memory with configurable depth and width Om P. Agrawal, Bradley A. Sharpe-Geisler, Bai Nguyen, Yu-Hua Huang 2005-07-19
6828823 Non-volatile and reconfigurable programmable logic devices Cyrus Y. Tsui, Benny Ma, Om P. Agrawal, Ju Shen, Sam Tsai +1 more 2004-12-07
6163168 Efficient interconnect network for use in FPGA device having variable grain architecture Bai Nguyen, Om P. Agrawal, Bradley A. Sharpe-Geisler, Herman M. Chang 2000-12-19
6154051 Tileable and compact layout for super variable grain blocks within FPGA device Bai Nguyen, Om P. Agrawal, Bradley A. Sharpe-Geisler, Herman M. Chang, Giap H. Tran 2000-11-28
6103576 Dielectric layer of a memory cell having a stacked oxide sidewall and method of fabricating same Neil Deustcher 2000-08-15
5748525 Array cell circuit with split read/write line Fabiano Fontana, Susan Xuan Nguyen 1998-05-05
5442304 CMOS logic gate clamping circuit Fabiano Fontana, Martha Chan 1995-08-15
5438278 High speed CMOS output buffer circuit minimizes propagation delay and crowbar current Fabiano Fontana, Henry Law 1995-08-01
5432463 High speed NOR gate with small output voltage swings Fabiano Fontana, Henry Law 1995-07-11
5418482 High-speed sense amplifier with regulated feedback Fabiano Fontana, Martha Chan 1995-05-23
5402081 Input buffer circuit with improved speed performance Fabiano Fontana, Susan Xuan Nguyen 1995-03-28