Issued Patents All Time
Showing 25 most recent of 143 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9648474 | Efficiently transmitting bulk data over a mobile network | Anita Agrawal | 2017-05-09 |
| 8122277 | Clock distribution chip | Shyam Chandra, Ludmil Nikolov, Harald Weller, Douglas C. Morse | 2012-02-21 |
| 8112656 | Clock distribution chip | Shyam Chandra, Ludmil Nikolov, Harald Weller, Douglas C. Morse | 2012-02-07 |
| 7957208 | Flexible memory architectures for programmable logic devices | Howard Tang, Fabiano Fontana, David L. Rutledge, Henry Law | 2011-06-07 |
| 7787326 | Programmable logic device with a multi-data rate SDRAM interface | Brad Sharpe-Geisler, Kiet Truong, Giap H. Tran, Bai Nguyen | 2010-08-31 |
| 7702977 | Programmable logic devices with custom identification systems and methods | Howard Tang, Fabiano Fontana | 2010-04-20 |
| 7696784 | Programmable logic device with multiple slice types | Xiaojie He, Sajitha Wijesuriya, Barry Britton, Ming H. Ding, Jun Zhao | 2010-04-13 |
| 7675321 | Dual-slice architectures for programmable logic devices | Xiaojie He, Sajitha Wijesuriya, Barry Britton, Ming H. Ding, Jun Zhao | 2010-03-09 |
| 7657773 | Clock distribution chip for generating both zero-delay and non-zero-delay clock signals | Shyam Chandra, Ludmil Nikolov, Harald Weller, Douglas C. Morse | 2010-02-02 |
| 7605606 | Area efficient routing architectures for programmable logic devices | Ming H. Ding, Sajitha Wijesuriya, Jun Zhao, Barry Britton, Xiaojie He | 2009-10-20 |
| 7592834 | Logic block control architectures for programmable logic devices | Xiaojie He, Sajitha Wijesuriya, Barry Britton, Ming H. Ding, Jun Zhao | 2009-09-22 |
| 7573291 | Programmable logic device with enhanced logic block architecture | Manish Garg, Chan-Chi Jason Cheng, Satwant Singh, Ju Shen | 2009-08-11 |
| 7554358 | Programmable logic devices with user non-volatile memory | Fabiano Fontana, Henry Law, Howard Tang, David L. Rutledge | 2009-06-30 |
| 7546498 | Programmable logic devices with custom identification systems and methods | Howard Tang, Fabiano Fontana | 2009-06-09 |
| 7495970 | Flexible memory architectures for programmable logic devices | Howard Tang, Fabiano Fontana, David L. Rutledge, Henry Law | 2009-02-24 |
| 7459931 | Programmable logic devices with transparent field reconfiguration | Howard Tang, Henry Law, David L. Rutledge, Fabiano Fontana | 2008-12-02 |
| 7459935 | Programmable logic devices with distributed memory | Brad Sharpe-Geisler, Jye-Yuh Lee, Bai Nguyen | 2008-12-02 |
| 7427874 | Interface block architectures | Ravindar M. Lall, David L. Rutledge, Tom Gustafson | 2008-09-23 |
| 7397276 | Logic block control architectures for programmable logic devices | Xiaojie He, Sajitha Wijesuriya, Barry Britton, Ming H. Ding, Jun Zhao | 2008-07-08 |
| 7385417 | Dual slice architectures for programmable logic devices | Xiaojie He, Sajitha Wijesuriya, Barry Britton, Ming H. Ding, Jun Zhao | 2008-06-10 |
| 7378873 | Programmable logic device providing a serial peripheral interface | Howard Tang, David L. Rutledge, Fabiano Fontana | 2008-05-27 |
| 7378872 | Programmable logic device architecture with multiple slice types | Barry Britton, Xiaojie He, Sajitha Wijesuriya, Ming H. Ding, Jun Zhao | 2008-05-27 |
| 7355441 | Programmable logic devices with distributed memory and non-volatile memory | Brad Sharpe-Geisler, Jye-Yuh Lee, Bai Nguyen | 2008-04-08 |
| 7342838 | Programmable logic device with a double data rate SDRAM interface | Brad Sharpe-Geisler, Kiet Truong, Giap H. Tran, Bai Nguyen | 2008-03-11 |
| 7327160 | SERDES with programmable I/O architecture | Jock Tomlinson, Kuang Chi, Ji-Cheng Zhao, Ju Shen, Jinghui Zhu | 2008-02-05 |