MG

Manish Garg

QU Qualcomm: 28 patents #828 of 12,104Top 7%
Microsoft: 6 patents #7,383 of 40,388Top 20%
NB Nxp B.V.: 5 patents #471 of 3,591Top 15%
CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
SN Stmicroelectronics International N.V.: 3 patents #160 of 696Top 25%
SA Skan Ag: 2 patents #3 of 17Top 20%
LS Lattice Semiconductor: 2 patents #213 of 544Top 40%
KL Kpmg Llp: 1 patents #67 of 141Top 50%
SA Sap Ag: 1 patents #1,847 of 3,812Top 50%
Overall (All Time): #48,478 of 4,157,543Top 2%
53
Patents All Time

Issued Patents All Time

Showing 25 most recent of 53 patents

Patent #TitleCo-InventorsDate
12417023 Host device caching of flash memory address mappings Pratibind Kumar JHA, Prakhar Srivastava, Santhosh Reddy AKAVARAM, Hung Vuong, Abhishek Ghosh +1 more 2025-09-16
12341926 Selective recording of multiuser calls Sairam Varada, Reddy Vijay GUDI, Shiva Kumar Mangali 2025-06-24
12271303 System and method for updating memory tables Pratibind Kumar JHA, Prakhar Srivastava, Santhosh Reddy AKAVARAM 2025-04-08
12265711 Mechanism to enhance endurance in universal flash storage devices Ashwini K. Pandey, Pratibind Kumar JHA 2025-04-01
11710313 Generating event logs from video streams Mubarak Abdulla, Sanjyot Gindi, Aanjan Hari, Evgueni Hadjev, Ajay Gabale +2 more 2023-07-25
11710152 Electronic determination of viewership by a vehicle of a media content Suhail Zain 2023-07-25
11704362 Assigning case identifiers to video streams Mubarak Abdulla, Sanjyot Gindi, Aanjan Hari, Evgueni Hadjev, Ajay Gabale +2 more 2023-07-18
11593117 Combining load or store instructions Harsh Thakker, Thomas Philip Speier, Rodney Wayne Smith, Kevin JAGET, James Norris Dieffenderfer +5 more 2023-02-28
11494540 Method, system, and computer program product for implementing electronic design closure with reduction techniques Sourav Kumar Sircar, Alwin Gupta, Marc Heyberger, Manish Bhatia 2022-11-08
11256837 Methods, systems, and computer program product for implementing an electronic design with high-capacity design closure Sourav Kumar Sircar, Marc Heyberger, Akash Khandelwal, Chunlong Pan, Ruchir Agarwal +5 more 2022-02-22
11126671 Serializing plug-in data in a web page Patrick Carl Miller, John Giang Nguyen, Chakkaradeep Chinnakonda Chandran, Daniel Kogan 2021-09-21
11075624 Hybrid driver having low output pad capacitance Saiyid Mohammad Irshad Rizvi 2021-07-27
11070198 Loop independent differential hysteresis receiver Ankit Agrawal 2021-07-20
10922358 System and method for analysis of structured and unstructured data Kallol K. Ghosh, Elliott A. Torres, Nikhil S. Dharap, Steve Rainey, Timothy J. Cerino +2 more 2021-02-16
10839037 Connected application experience Aninda Ray, Ryan Nakhoul, Benjamin Kaiser, Ping Jiang, Dennis Joel David Myren +2 more 2020-11-17
10559352 Bitline-driven sense amplifier clocking scheme Harish Shankar, Rahul K. Nadkarni, Rajesh Kumar, Michael ThaiThanh Phan 2020-02-11
10541044 Providing efficient handling of memory array failures in processor-based systems Thomas Philip Speier, Viren Ramesh Patel, Michael ThaiThanh Phan, Kevin N. Magill, Paul M. Steinmetz +2 more 2020-01-21
10491673 Synchronization of conversation data Gautam Bhakar 2019-11-26
10171080 Voltage level shifter (VLS) circuits employing a pre-conditioning circuit for pre-conditioning an input signal to be voltage level shifted in response to a pre-charge phase 2019-01-01
10050448 Providing current cross-conduction protection in a power rail control system Yeshwant Nagaraj Kolla, Neel Shashank Natekar 2018-08-14
9960759 N-bit compare logic with single ended inputs Ramasamy Adaikkalavan 2018-05-01
9911472 Write bitline driver for a dual voltage domain Shaoping Ge, Chiaming Chai, Stephen Edward Liles 2018-03-06
9870818 Separate read and write address decoding in a memory system to support simultaneous memory read and write operations 2018-01-16
9768779 Voltage level shifters employing preconditioning circuits, and related systems and methods Rahul K. Nadkarni, Stephen Edward Liles 2017-09-19
9666269 Collision detection systems for detecting read-write collisions in memory systems after word line activation, and related systems and methods Harish Shankar, Joshua Puckett, Rahul K. Nadkarni 2017-05-30