Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11527274 | Memory array circuits including word line circuits for improved word line signal timing and related methods | Chiaming Chai, Jason Philip Martzloff | 2022-12-13 |
| 9911472 | Write bitline driver for a dual voltage domain | Chiaming Chai, Stephen Edward Liles, Manish Garg | 2018-03-06 |
| 9608637 | Dynamic voltage level shifters employing pulse generation circuits, and related systems and methods | Chiaming Chai, Stephen Edward Liles, Chintan Shah | 2017-03-28 |
| 9442675 | Redirecting data from a defective data entry in memory to a redundant data entry prior to data access, and related systems and methods | Chiaming Chai, Stephen Edward Liles | 2016-09-13 |
| 9196330 | Mimicking multi-voltage domain wordline decoding logic for a memory array | Chiaming Chai, Stephen Edward Liles, Lam Nguyen, Jeffrey Herbert Fischer | 2015-11-24 |
| 9007817 | Pre-charging bitlines in a static random access memory (SRAM) prior to data access for reducing leakage power, and related systems and methods | Chiaming Chai, Stephen Edward Liles, Kunal Garg | 2015-04-14 |
| 8638153 | Pulse clock generation logic with built-in level shifter and programmable rising edge and pulse width | Chiaming Chai, Stephen Edward Liles, Lam Nguyen, Jeffrey Herbert Fischer | 2014-01-28 |
| 7564266 | Logic state catching circuits | Chiaming Chai, Jeffrey Herbert Fischer | 2009-07-21 |
| 6815991 | Clock frequency multiplier | Gin Yee | 2004-11-09 |