Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Pulse clock generation logic with built-in level shifter and programmable rising edge and pulse width

Pulse clock generation logic with built-in level shifter and programmable rising edge and pulse width

US Patent 8638153 · Granted Jan 28, 2014

Estimated economic value: $6,840,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Communication method and apparatus2025
Communication processing method and apparatus2025
Resource configuration method and apparatus, and system2025
Computer memory arrays employing memory banks and integrated serializer/de-seria2024
Memory system with burst mode having logic gates as sense elements2024
Memory system with burst mode having logic gates as sense elements2023
Method and apparatus for displaying content on display2023
Memory having flying bitlines for improved burst mode read operations2023
Memory array circuits including word line circuits for improved word line signal2022
Memory array circuits including word line circuits for improved word line signal2022
Reciprocal quantum logic inverter2022
Method, apparatus, and system for a level shifting latch with embedded logic2020