Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9495503 | Method and apparatus to enable a selective push process during manufacturing to improve performance of a selected circuit of an integrated circuit | Jeffrey Herbert Fischer, Zhongze Wang | 2016-11-15 |
| 9471615 | Enhancing content mediated engagement | Avinash Birnale, Vikram Vadiraja Chadaga, Ajay Gabale, Dwarakanathan L N | 2016-10-18 |
| 9413703 | Synchronizing conversation structures in web-based email systems | Patrick Tousignant, Sridhar Raman | 2016-08-09 |
| 9396794 | Matchline retention for mitigating search and write conflict | Rahul K. Nadkarni | 2016-07-19 |
| 9331671 | Automatic power switching and power harvesting in thin oxide open drain transmitter circuits, systems, and methods | Nitin Gupta, Paramjeet Singh Sahni, Tapas Nandy | 2016-05-03 |
| 9294307 | Synchronization of conversation data | Gautam Bhakar | 2016-03-22 |
| 9129706 | Dummy read to prevent crowbar current during read-write collisions in memory arrays with crosscoupled keepers | Harish Shankar, David Paul Hoff | 2015-09-08 |
| 9093125 | Low voltage write speed bitcell | Joshua Puckett, Harish Shankar | 2015-07-28 |
| 9043795 | Apparatus and methods for adaptive thread scheduling on asymmetric multiprocessor | Michael William Morrow | 2015-05-26 |
| 8976618 | Decoded 2N-bit bitcells in memory for storing decoded bits, and related systems and methods | Rajesh Kumar | 2015-03-10 |
| 8875082 | System and method for detecting and prescribing physical corrections for timing violations in pruned timing data for electronic circuit design defined by physical implementation data | Sourav Kumar Sircar | 2014-10-28 |
| 8824230 | Method and apparatus of reducing leakage power in multiple port SRAM memory cell | Michael ThaiThanh Phan, David Paul Hoff | 2014-09-02 |
| 8730713 | SRAM cell writability | Michael ThaiThanh Phan | 2014-05-20 |
| 8724373 | Apparatus for selective word-line boost on a memory cell | Michael ThaiThanh Phan | 2014-05-13 |
| 8659972 | Adaptive read wordline voltage boosting apparatus and method for multi-port SRAM | Michael ThaiThanh Phan, David Paul Hoff, Quan Nguyen | 2014-02-25 |
| 8576612 | Low leakage high performance static random access memory cell using dual-technology transistors | Chiaming Chai, Michael ThaiThanh Phan | 2013-11-05 |
| 8533275 | Synchronizing conversation structures in web-based email systems | Patrick Tousignant, Sridhar Sundararaman | 2013-09-10 |
| 8239447 | Retrieving data using an asynchronous buffer | Martin Stein, Martin Steiner | 2012-08-07 |
| 8181054 | Arrangement and method for controlling power modes of hardware resources | Andrei Sergeevich Terechko | 2012-05-15 |
| 8008961 | Adaptive clock generators, systems, and methods | Chiaming Chai, Jeffrey Todd Bridges | 2011-08-30 |
| 7961499 | Low leakage high performance static random access memory cell using dual-technology transistors | Chiaming Chai, Michael ThaiThanh Phan | 2011-06-14 |
| 7725792 | Dual-path, multimode sequential storage element | Fadi Adel Hamdan | 2010-05-25 |
| 7577858 | Method for reducing power consumption in a state retaining circuit, state retaining circuit and electronic device | Kiran Batni Raghavendra Rao, Jose De Jesus Pineda De Gyvez | 2009-08-18 |
| 7573291 | Programmable logic device with enhanced logic block architecture | Om P. Agrawal, Chan-Chi Jason Cheng, Satwant Singh, Ju Shen | 2009-08-11 |
| 7539879 | Register file gating to reduce microprocessor power dissipation | Andrei Sergeevich Terechko | 2009-05-26 |