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Virtualized scan chain testing in a random access memory (RAM) array |
Yeshwant Nagaraj Kolla, Rahul K. Nadkarni, Babji Vallabhaneni |
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Efficiently generating selection masks for row selections within indexed address spaces |
Milind Ram Kulkarni, Benjamin J. Bowers |
2017-12-26 |
| 9830965 |
Multiple-hot (multi-hot) bit decoding in a memory system for activating multiple memory locations in a memory for a memory access operation |
Milind Ram Kulkarni |
2017-11-28 |
| 9640250 |
Efficient compare operation |
Stephen Edward Liles, Brian Joy Reed |
2017-05-02 |
| 9384795 |
Fully valid-gated read and write for low power array |
Jason Philip Martzloff, Robert A. Sweitzer |
2016-07-05 |
| 9378789 |
Voltage level shifted self-clocked write assistance |
Amey Kulkarni, Jason Philip Martzloff, Stephen Edward Liles |
2016-06-28 |
| 9165650 |
Hybrid dynamic-static encoder with optional hit and/or multi-hit detection |
Tracey Della Rova, Jason Philip Martzloff |
2015-10-20 |
| 9129706 |
Dummy read to prevent crowbar current during read-write collisions in memory arrays with crosscoupled keepers |
Harish Shankar, Manish Garg |
2015-09-08 |
| 9003111 |
Methods and apparatus providing high-speed content addressable memory (CAM) search-invalidates |
Manju Rathna Varma, Jason Philip Martzloff |
2015-04-07 |
| 8824230 |
Method and apparatus of reducing leakage power in multiple port SRAM memory cell |
Michael ThaiThanh Phan, Manish Garg |
2014-09-02 |
| 8659972 |
Adaptive read wordline voltage boosting apparatus and method for multi-port SRAM |
Michael ThaiThanh Phan, Manish Garg, Quan Nguyen |
2014-02-25 |
| 8572313 |
Methods and apparatus providing high-speed content addressable memory (CAM) search-invalidates |
Manju Rathna Varma, Jason Philip Martzloff |
2013-10-29 |
| 8432195 |
Latch circuits with synchronous data loading and self-timed asynchronous data capture |
Fadi Adel Hamdan |
2013-04-30 |
| 7952901 |
Content addressable memory |
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2011-05-31 |