Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11494540 | Method, system, and computer program product for implementing electronic design closure with reduction techniques | Alwin Gupta, Marc Heyberger, Manish Bhatia, Manish Garg | 2022-11-08 |
| 11256837 | Methods, systems, and computer program product for implementing an electronic design with high-capacity design closure | Marc Heyberger, Manish Garg, Akash Khandelwal, Chunlong Pan, Ruchir Agarwal +5 more | 2022-02-22 |
| 8875082 | System and method for detecting and prescribing physical corrections for timing violations in pruned timing data for electronic circuit design defined by physical implementation data | Manish Garg | 2014-10-28 |
| 8095900 | Achieving clock timing closure in designing an integrated circuit | Manish Baronia | 2012-01-10 |