Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11206025 | Input/output bus protection systems and methods for programmable logic devices | Chwei-Po Chew | 2021-12-21 |
| 10630269 | Multiple mode device implementation for programmable logic devices | Senani Gunaratna, Ting Yew | 2020-04-21 |
| 10417078 | Deterministic read back and error detection for programmable logic devices | Loren L. McLaury | 2019-09-17 |
| 10382021 | Flexible ripple mode device implementation for programmable logic devices | Senani Gunaratna, Ting Yew | 2019-08-13 |
| 10141917 | Multiple mode device implementation for programmable logic devices | Senani Gunaratna, Ting Yew | 2018-11-27 |
| 10079054 | Selective power gating of routing resource configuration memory bits for programmable logic devices | Senani Gunaratna, Ting Yew, Ronald L. Cline | 2018-09-18 |
| 9735761 | Flexible ripple mode device implementation for programmable logic devices | Senani Gunaratna, Ting Yew | 2017-08-15 |
| 9716491 | Multiple mode device implementation for programmable logic devices | Senani Gunaratna, Ting Yew | 2017-07-25 |
| 9543950 | High speed complementary NMOS LUT logic | Senani Gunaratna, Ting Yew | 2017-01-10 |
| 9537308 | ESD protection using shared RC trigger | Keith Truong, Ravi Lall | 2017-01-03 |
| 9515643 | Hot-socket circuitry | Keith Truong, Ravi Lall, Giap H. Tran | 2016-12-06 |
| 9287872 | PVT compensation scheme for output buffers | Siak Chon Kee, Giap H. Tran | 2016-03-15 |
| 9252755 | Shared logic for multiple registers with asynchronous initialization | Ting Yew, Senani Gunaratna | 2016-02-02 |
| 8971146 | Dual-port SRAM with bit line clamping | Timothy Scott Swensen, Sam Tsai, Fabiano Fontana | 2015-03-03 |
| 8643168 | Integrated circuit package with input capacitance compensation | Ban Wong | 2014-02-04 |
| 8451679 | Dual-port SRAM with bit line clamping | Timothy Scott Swensen, Sam Tsai, Fabiano Fontana | 2013-05-28 |
| 7868646 | Soft error upset hardened integrated circuit systems and methods | Satwant Singh | 2011-01-11 |
| 7787326 | Programmable logic device with a multi-data rate SDRAM interface | Om P. Agrawal, Kiet Truong, Giap H. Tran, Bai Nguyen | 2010-08-31 |
| 7741865 | Soft error upset hardened integrated circuit systems and methods | Satwant Singh | 2010-06-22 |
| 7576563 | High fan-out signal routing systems and methods | Qin Wei, Chan-Chi Jason Cheng, Ting Yew | 2009-08-18 |
| 7558143 | Programmable logic device with power-saving architecture | Henry Law, Giap H. Tran, Kiet Truong, Bai Nguyen | 2009-07-07 |
| 7459935 | Programmable logic devices with distributed memory | Om P. Agrawal, Jye-Yuh Lee, Bai Nguyen | 2008-12-02 |
| 7411419 | Input/output systems and methods | Kiet Truong, Giap H. Tran, Bai Nguyen | 2008-08-12 |
| 7376037 | Programmable logic device with power-saving architecture | Henry Law, Giap H. Tran, Kiet Truong, Bai Nguyen | 2008-05-20 |
| 7355441 | Programmable logic devices with distributed memory and non-volatile memory | Om P. Agrawal, Jye-Yuh Lee, Bai Nguyen | 2008-04-08 |