Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Deterministic read back and error detection for programmable logic devices

Deterministic read back and error detection for programmable logic devices

US Patent 10417078 · Granted Sep 17, 2019

Estimated economic value: $34,320,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Dual power supplied memory cells and deterministic reset thereof for programmabl2025
Selectively powered embedded memory systems and methods2025
Power supply regulation for programmable logic devices2022
Input/output bus protection systems and methods for programmable logic devices2021
Multiple mode device implementation for programmable logic devices2020
Flexible ripple mode device implementation for programmable logic devices2019
Multiple mode device implementation for programmable logic devices2018
Selective power gating of routing resource configuration memory bits for program2018
Flexible ripple mode device implementation for programmable logic devices2017
Multiple mode device implementation for programmable logic devices2017
Leakage-current abatement circuitry for memory arrays2017
High speed complementary NMOS LUT logic2017