Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9299643 | Ruthenium interconnect with high aspect ratio and method of fabrication thereof | Zheng Wang, Connie P. Wang, Erik Wilson, Wen Yu | 2016-03-29 |
| 7843015 | Multi-silicide system in integrated circuit technology | Paul R. Besser, Simon S. Chan, Jeffrey P. Patton, Austin Frenkel, Thorsten Kammler +1 more | 2010-11-30 |
| 7670915 | Contact liner in integrated circuit technology | Errol Todd Ryan, Paul R. Besser, Simon S. Chan, Mehrdad Mahanpour, Minh Van Ngo | 2010-03-02 |
| 7468296 | Thin film germanium diode with low reverse breakdown | Ercan Adem, Matthew S. Buynoski, Bryan K. Choo, Calvin T. Gabriel, Joong S. Jeon +5 more | 2008-12-23 |
| 7378310 | Method for manufacturing a memory device having a nanocrystal charge storage region | Connie P. Wang, Zoran Krivokapic, Suzette K. Pangrle, Lu You | 2008-05-27 |
| 7307322 | Ultra-uniform silicide system in integrated circuit technology | Jeffrey P. Patton, Paul R. Besser, Minh Van Ngo | 2007-12-11 |
| 7151020 | Conversion of transition metal to silicide through back end processing in integrated circuit technology | Jeffrey P. Patton, Austin Frenkel, Thorsten Kammler, Errol Todd Ryan, Darin A. Chan +3 more | 2006-12-19 |
| 7049666 | Low power pre-silicide process in integrated circuit technology | Jeffrey P. Patton, Paul R. Besser, Minh Van Ngo | 2006-05-23 |
| 7005357 | Low stress sidewall spacer in integrated circuit technology | Minh Van Ngo, Simon S. Chan, Paul R. Besser, Paul L. King, Errol Todd Ryan | 2006-02-28 |
| 7005376 | Ultra-uniform silicides in integrated circuit technology | Jeffrey P. Patton, Paul R. Besser, Minh Van Ngo | 2006-02-28 |
| 6969678 | Multi-silicide in integrated circuit technology | Paul R. Besser, Simon S. Chan, Jeffrey P. Patton, Austin Frenkel, Thorsten Kammler +1 more | 2005-11-29 |
| 6576548 | Method of manufacturing a semiconductor device with reliable contacts/vias | Amy C. Tu, Minh Van Ngo, Austin Frenkel, Jeff P. Erhardt | 2003-06-10 |
| 6171737 | Low cost application of oxide test wafer for defect monitor in photolithography process | Khoi A. Phan, Shobhana Punjabi, Bhanwar Singh | 2001-01-09 |