Issued Patents All Time
Showing 25 most recent of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11183509 | Non-volatile memory with silicided bit line contacts | Ching-Huang Lu, Hidehiko Shiraiwa, Lei Xue | 2021-11-23 |
| 10692877 | Non-volatile memory with silicided bit line contacts | Ching-Huang Lu, Hidehiko Shiraiwa, Lei Xue | 2020-06-23 |
| 10256137 | Self-aligned trench isolation in integrated circuits | Ching-Huang Lu, Lei Xue, Kenichi Ohtsuka, Rinji Sugino | 2019-04-09 |
| 9831114 | Self-aligned trench isolation in integrated circuits | Ching-Huang Lu, Lei Xue, Kenichi Ohtsuka, Rinji Sugino | 2017-11-28 |
| 9673206 | Buried hard mask for embedded semiconductor device patterning | Scott A. Bell, Angela T. Hui | 2017-06-06 |
| 9666591 | Non-volatile memory with silicided bit line contacts | Ching-Huang Lu, Hidehiko Shiraiwa, Lei Xue | 2017-05-30 |
| 9437470 | Self-aligned trench isolation in integrated circuits | Ching-Huang Lu, Lei Xue, Kenichi Ohtsuka, Rinji Sugino | 2016-09-06 |
| 9431503 | Integrating transistors with different poly-silicon heights on the same die | Chuan Lin, Hidehiko Shiraiwa, Bradley Marc Davis, Lei Xue, Kenichi Ohtsuka +2 more | 2016-08-30 |
| 9318498 | Buried hard mask for embedded semiconductor device patterning | Scott A. Bell, Angela T. Hui | 2016-04-19 |
| 9252026 | Buried trench isolation in integrated circuits | Rinji Sugino, Lei Xue, Ching-Huang Lu | 2016-02-02 |
| 9252154 | Non-volatile memory with silicided bit line contacts | Ching-Huang Lu, Hidehiko Shiraiwa, Lei Xue | 2016-02-02 |
| 9185793 | Multilayer electronic structure with through thickness coaxial structures | Dror Hurwitz, Alex Huang | 2015-11-10 |
| 9161461 | Multilayer electronic structure with stepped holes | Dror Hurwitz, Alex Huang | 2015-10-13 |
| 9137905 | Alignment between layers of multilayer electronic support structures | Dror Hurwitz | 2015-09-15 |
| 8866213 | Non-Volatile memory with silicided bit line contacts | Ching-Huang Lu, Hidehiko Shiraiwa, Lei Xue | 2014-10-21 |
| 8735960 | High ultraviolet light absorbance silicon oxynitride film for improved flash memory device performance | Minh Quoc Tran, Minh Van Ngo, Alexander H. Nickel, Sung Jin Kim, Ning Cheng | 2014-05-27 |
| 8652907 | Integrating transistors with different poly-silicon heights on the same die | Chuan Lin, Hidehiko Shiraiwa, Bradley Marc Davis, Lei Xue, Kenichi Ohtsuka +2 more | 2014-02-18 |
| 8617983 | Local interconnect having increased misalignment tolerance | — | 2013-12-31 |
| 8598005 | Method and manufacture for embedded flash to achieve high quality spacers for core and high voltage devices and low temperature spacers for high performance logic devices | Hidehiko Shiraiwa, Chuan Lin, Lei Xue, Kenichi Ohtsuka, Angela T. Hui | 2013-12-03 |
| 8314454 | Local interconnect having increased misalignment tolerance | — | 2012-11-20 |
| 8283249 | Local interconnect having increased misalignment tolerance | — | 2012-10-09 |
| 8236693 | Methods of forming silicides of different thicknesses on different structures | Wen Yu, Paul R. Besser, Bin Yang, Haijiang Yu | 2012-08-07 |
| 8114736 | Integrated circuit system with memory system | Hidehiko Shiraiwa, Kuo-Tung Chang, Angela T. Hui | 2012-02-14 |
| 8102009 | Integrated circuit eliminating source/drain junction spiking | Paul R. Besser, Jeffrey P. Patton | 2012-01-24 |
| 7879718 | Local interconnect having increased misalignment tolerance | — | 2011-02-01 |