Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Bradley Marc Davis — 14 Patents

AMD: 7 patents #1,810 of 9,280Top 20%
SLSpansion Llc.: 5 patents #175 of 769Top 25%
Cypress Semiconductor: 2 patents #966 of 1,866Top 55%
Mountain View, CA: #1,580 of 11,022 inventorsTop 15%
California: #43,920 of 386,348 inventorsTop 15%
Overall (All Time): #332,869 of 4,157,543Top 9%
14 Patents All Time
Bradley Marc Davis has been granted 14 US patents while listed as an inventor at AMD. The first was granted in 2000 and the most recent in August 2016. Bradley Marc Davis ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Bradley Marc Davis in Mountain View, CA, US.

Patents per Year

Patents granted per year, 2000 to 2016Bar chart with a peak of 3 patents in 2002.peak 32000: 1 patents20002001: 1 patents2002: 3 patents20022003: 1 patents2004: 1 patents20042009: 1 patents2011: 1 patents20112013: 1 patents2014: 2 patents20142015: 1 patents2016: 1 patents2016

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9431503 Integrating transistors with different poly-silicon heights on the same die Chuan Lin, Hidehiko Shiraiwa, Lei Xue, Simon S. Chan, Kenichi Ohtsuka +2 more 2016-08-30 $6,776,000
9196624 Leakage reducing writeline charge protection circuit Mark Randolph, Sung-Yong Chung, Hidehiko Shiraiwa 2015-11-24 $7,356,000
8809206 Patterned dummy wafers loading in batch type CVD Rinji Sugino, Lei Xue, Kenichi Ohtsuka 2014-08-19 $4,207,000
8652907 Integrating transistors with different poly-silicon heights on the same die Chuan Lin, Hidehiko Shiraiwa, Lei Xue, Simon S. Chan, Kenichi Ohtsuka +2 more 2014-02-18 $2,278,000
8409994 Gate trim process using either wet etch or dry etch approach to target CD for selected transistors Jihwan P. Choi, Angela T. Hui 2013-04-02 $2,639,000
8067314 Gate trim process using either wet etch or dry etch approach to target CD for selected transistors Jihwan P. Choi, Angela T. Hui 2011-11-29 $4,017,000
7553727 Using implanted poly-1 to improve charging protection in dual-poly process Ming Sang Kwan, Jean Y. Yang, Zhizheng Liu, Yi He 2009-06-30
6684122 Control mechanism for matching process parameters in a multi-chamber process tool Craig W. Christian, Allen L. Evans 2004-01-27 $5,673,000
6512991 Method and apparatus for reducing deposition variation by modeling post-clean chamber performance Allen L. Evans, Craig W. Christian 2003-01-28 $2,528,000
6492281 Method of fabricating conductor structures with metal comb bridging avoidance Shengnian Song, Sey-Ping Sun 2002-12-10 $2,246,000
6469518 Method and apparatus for determining measurement frequency based on hardware age and usage Allen L. Evans, Craig W. Christian 2002-10-22 $2,399,000
6403151 Method for controlling optical properties of antireflective coatings Craig W. Christian, Allen L. Evans 2002-06-11 $2,353,000
6257760 Using a superlattice to determine the temperature of a semiconductor fabrication process Shengnian Song, Sey-Ping Sun 2001-07-10 $4,638,000
6022749 Using a superlattice to determine the temperature of a semiconductor fabrication process Shengnian Song, Sey-Ping Sun 2000-02-08 $8,952,000