Issued Patents All Time
Showing 25 most recent of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11705455 | High voltage extended drain MOSFET (EDMOS) devices in a high-k metal gate (HKMG) | Peter Baars | 2023-07-18 |
| 11289598 | Co-integrated high voltage (HV) and medium voltage (MV) field effect transistors | Nan Wu, Peter Baars | 2022-03-29 |
| 10141229 | Process for forming semiconductor layers of different thickness in FDSOI technologies | Jurgen Faul | 2018-11-27 |
| 9876111 | Method of forming a semiconductor device structure using differing spacer widths and the resulting semiconductor device structure | Steffen Sichler, Peter Javorka, Juergen Faul, Sylvain Baudot | 2018-01-23 |
| 9514942 | Method of forming a gate mask for fabricating a structure of gate lines | Elliot John Smith, Andreas Hellmich, Carsten Grass | 2016-12-06 |
| 9466685 | Semiconductor structure including at least one electrically conductive pillar, semiconductor structure including a contact contacting an outer layer of an electrically conductive structure and method for the formation thereof | Hans-Peter Moll, Peter Baars | 2016-10-11 |
| 9450073 | SOI transistor having drain and source regions of reduced length and a stressed dielectric material adjacent thereto | Andy Wei, Roman Boschke, Casey Scott | 2016-09-20 |
| 8906811 | Shallow pn junction formed by in situ doping during selective growth of an embedded semiconductor alloy by a cyclic growth/etch deposition process | Andy Wei, Ina Ostermay | 2014-12-09 |
| 8779529 | Self-aligned silicidation for replacement gate process | Indradeep Sen, Andreas Knorr, Akif Sultan | 2014-07-15 |
| 8674416 | Semiconductor device with reduced threshold variability having a threshold adjusting semiconductor alloy in the device active region | Carsten Reichel, Annekathrin Zeun, Stephan Kronholz | 2014-03-18 |
| 8652913 | Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium loss | Andreas Gehring, Maciej Wiatr, Andy Wei, Roman Boschke, Casey Scott | 2014-02-18 |
| 8569143 | Methods of fabricating a semiconductor IC having a hardened shallow trench isolation (STI) | Joerg Radecker, Christof Streck | 2013-10-29 |
| 8518784 | Adjusting of strain caused in a transistor channel by semiconductor material provided for threshold adjustment | Stephan Kronholz, Gunda Beernink, Carsten Reichel | 2013-08-27 |
| 8481404 | Leakage control in field effect transistors based on an implantation species introduced locally at the STI edge | Maciej Wiatr, Roman Boschke, Peter Javorka | 2013-07-09 |
| 8440516 | Method of forming a field effect transistor | Andy Wei, Jan Hoentschel, Manfred Horstmann | 2013-05-14 |
| 8361870 | Self-aligned silicidation for replacement gate process | Indradeep Sen, Andreas Knorr, Akif Sultan | 2013-01-29 |
| 8324119 | Enhancing deposition uniformity of a channel semiconductor alloy by an in situ etch process | Carsten Reichel, Annekathrin Zeun, Stephan Kronholz | 2012-12-04 |
| 8293596 | Formation of a channel semiconductor alloy by depositing a hard mask for the selective epitaxial growth | Stephan Kronholz, Carsten Reichel, Annekathrin Zeun | 2012-10-23 |
| 8274120 | Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions | Andy Wei, Jan Hoentschel, Manfred Horstmann, Peter Javorka, Joe Bloomquist | 2012-09-25 |
| 8198166 | Using high-k dielectrics as highly selective etch stop materials in semiconductor devices | Ralf Richter, Markus Lenski, Gunter Grasshoff | 2012-06-12 |
| 8119461 | Reducing the creation of charge traps at gate dielectrics in MOS transistors by performing a hydrogen treatment | Martin Trentzsch, Rolf Stephan | 2012-02-21 |
| 8114746 | Method for forming double gate and tri-gate transistors on a bulk substrate | Andy Wei, Robert Neil Mulfinger, Thilo Scheiper | 2012-02-14 |
| 8053273 | Shallow PN junction formed by in situ doping during selective growth of an embedded semiconductor alloy by a cyclic growth/etch deposition process | Andy Wei, Ina Ostermay | 2011-11-08 |
| 8039878 | Transistor having a channel with tensile strain and oriented along a crystallographic orientation with increased charge carrier mobility | Igor Peidous, Andy Wei | 2011-10-18 |
| 7843015 | Multi-silicide system in integrated circuit technology | Robert J. Chiu, Paul R. Besser, Simon S. Chan, Jeffrey P. Patton, Austin Frenkel +1 more | 2010-11-30 |