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USPTO Patent Rankings Data through Dec 31, 2025
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Akif Sultan — 31 Patents

AMD: 19 patents #580 of 9,280Top 7%
Globalfoundries: 12 patents #298 of 4,424Top 7%
Austin, TX: #974 of 18,064 inventorsTop 6%
Texas: #3,737 of 125,132 inventorsTop 3%
Overall (All Time): #115,823 of 4,157,543Top 3%
31 Patents All Time
Akif Sultan has been granted 31 US patents while listed as an inventor at AMD. The first was granted in 1999 and the most recent in February 2016. Akif Sultan ranks #115,823 of 4,157,543 US inventors in our database (top 2.8%). Patent records list Akif Sultan in Austin, TX, US.

Issued Patents All Time

Showing 1–25 of 31 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9269710 Semiconductor devices having stressor regions and related fabrication methods Indradeep Sen 2016-02-23 $655,000
8779529 Self-aligned silicidation for replacement gate process Indradeep Sen, Thorsten Kammler, Andreas Knorr 2014-07-15 $3,357,000
8687417 Electronic device and method of biasing Ruigang Li, Jingrong Zhou, David Wu, Zhonghai Shi, James F. Buller +2 more 2014-04-01 $6,826,000
8497179 Method of fabricating multi-fingered semiconductor devices on a common substrate 2013-07-30 $3,697,000
8426278 Semiconductor devices having stressor regions and related fabrication methods Indradeep Sen 2013-04-23 $3,381,000
8377781 Transistor with asymmetric silicon germanium source region Jian Chen, James F. Buller 2013-02-19 $2,503,000
8361870 Self-aligned silicidation for replacement gate process Indradeep Sen, Thorsten Kammler, Andreas Knorr 2013-01-29 $4,433,000
8076703 Semiconductor device and methods for fabricating same James F. Buller, Kaveri Mathur 2011-12-13 $8,972,000
8035098 Transistor with asymmetric silicon germanium source region Jian Chen, James F. Buller 2011-10-11 $4,727,000
7793240 Compensating for layout dimension effects in semiconductor device modeling Jian Chen, Mark W. Michael, Jingrong Zhou 2010-09-07 $6,542,000
7761838 Method for fabricating a semiconductor device having an extended stress liner Zhonghai Shi, Mark W. Michael, David Wu, James F. Buller, Jingrong Zhou 2010-07-20 $12,141,000
7638837 Stress enhanced semiconductor device and methods for fabricating same Mark W. Michael, David Wu 2009-12-29 $14,633,000
7633103 Semiconductor device and methods for fabricating same James F. Buller, Kaveri Mathur 2009-12-15 $19,433,000
7598161 Method of forming transistor devices with different threshold voltages using halo implant shadowing Jingrong Zhou, Mark W. Michael, David Wu, James F. Buller 2009-10-06 $63,123,000
7582493 Distinguishing between dopant and line width variation components James F. Buller, David Wu 2009-09-01 $18,287,000
7504270 Methods of quantifying variations resulting from manufacturing-induced corner rounding of various features, and structures for testing same David Wu, Mark W. Michael, Jingrong Zhou 2009-03-17 $2,427,000
7176095 Bi-modal halo implantation David Wu, Wen-Jie Qi, Mark B. Fuselier 2007-02-13 $17,943,000
6979635 Method of forming miniaturized polycrystalline silicon gate electrodes using selective oxidation Qi Xiang, Bin Yu 2005-12-27 $8,074,000
6921704 Method for improving MOS mobility David Wu, Bin Yu 2005-07-26 $17,204,000
6864516 SOI MOSFET junction degradation using multiple buried amorphous layers Andy Wei, David Wu 2005-03-08 $6,020,000
6777281 Maintaining LDD series resistance of MOS transistors by retarding dopant segregation Daniel Kadosh, Scott Luning, David Wu 2004-08-17 $3,269,000
6727136 Formation of ultra-shallow depth source/drain extensions for MOS transistors James F. Buller, Derick J. Wristers, David Wu 2004-04-27 $2,236,000
6642536 Hybrid silicon on insulator/bulk strained silicon technology Qi Xiang 2003-11-04 $3,831,000
6593623 Reduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusion 2003-07-15 $1,952,000
6475885 Source/drain formation with sub-amorphizing implantation 2002-11-05 $1,578,000