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USPTO Patent Rankings Data through Dec 31, 2025
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Mark B. Fuselier — 19 Patents

AMD: 19 patents #586 of 9,280Top 7%
Austin, TX: #1,717 of 18,064 inventorsTop 10%
Texas: #7,372 of 125,132 inventorsTop 6%
Overall (All Time): #229,345 of 4,157,543Top 6%
19 Patents All Time
Mark B. Fuselier has been granted 19 US patents while listed as an inventor at AMD. The first was granted in 2001 and the most recent in June 2009. Mark B. Fuselier ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Mark B. Fuselier in Austin, TX, US.

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7544999 SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate Andy Wei, Derick J. Wristers 2009-06-09 $8,157,000
7432136 Transistors with controllable threshold voltages, and various methods of making and operating same Derick J. Wristers, Andy Wei 2008-10-07 $7,530,000
7335568 Method of forming doped regions in the bulk substrate of an SOI substrate to control the operational characteristics of transistors formed thereabove, and an integrated circuit device comprising same Derick J. Wristers, Andy Wei 2008-02-26 $8,371,000
7180136 Biased, triple-well fully depleted SOI structure Andy Wei, Derick J. Wristers 2007-02-20 $8,070,000
7176095 Bi-modal halo implantation Akif Sultan, David Wu, Wen-Jie Qi 2007-02-13 $17,943,000
7129142 Method of forming doped regions in the bulk substrate of an SOI substrate to control the operational characteristics of transistors formed thereabove, and an integrated circuit device comprising same Derick J. Wristers, Andy Wei 2006-10-31 $12,737,000
6919236 Biased, triple-well fully depleted SOI structure, and various methods of making and operating same Andy Wei, Derick J. Wristers 2005-07-19 $21,853,000
6884702 Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate Andy Wei, Derick J. Wristers 2005-04-26 $7,241,000
6876037 Fully-depleted SOI device Andy Wei, Derick J. Wristers 2005-04-05 $7,987,000
6806111 Semiconductor component and method of manufacture Edward E. Ehrichs 2004-10-19 $2,591,000
6794256 Method for asymmetric spacer formation Edward E. Ehrichs, S. Doug Ray, Chad Weintraub, James F. Buller 2004-09-21 $3,701,000
6780686 Doping methods for fully-depleted SOI structures, and device comprising the resulting doped regions Andy Wei, Derick J. Wristers 2004-08-24 $2,825,000
6737332 Semiconductor device formed over a multiple thickness buried oxide layer, and methods of making same Derick J. Wristers, Andy Wei 2004-05-18 $4,574,000
6583016 Doped spacer liner for improved transistor performance Andy Wei, Ping-Chin Yeh 2003-06-24 $2,352,000
6570228 Method and apparatus for electrically measuring insulating film thickness Roger Thomas Williams, Michael Fenske 2003-05-27 $3,164,000
6463570 Apparatus and method for verifying process integrity Michael J. Dunn 2002-10-08 $890,000
6426262 Method of analyzing the effects of shadowing of angled halo implants Jon D. Cheek, Frederick N. Hause, Marilyn I. Wright 2002-07-30 $3,277,000
6410350 Detecting die speed variations Stephen Doug Ray, Michael J. Dunn, Roger Thomas Williams, Michael Fenske 2002-06-25 $2,000,000
6287877 Electrically quantifying transistor spacer width Roger Thomas Williams, Michael Fenske 2001-09-11