MF

Mark B. Fuselier

AM AMD: 19 patents #572 of 9,279Top 7%
Overall (All Time): #241,496 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7544999 SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate Andy Wei, Derick J. Wristers 2009-06-09
7432136 Transistors with controllable threshold voltages, and various methods of making and operating same Derick J. Wristers, Andy Wei 2008-10-07
7335568 Method of forming doped regions in the bulk substrate of an SOI substrate to control the operational characteristics of transistors formed thereabove, and an integrated circuit device comprising same Derick J. Wristers, Andy Wei 2008-02-26
7180136 Biased, triple-well fully depleted SOI structure Andy Wei, Derick J. Wristers 2007-02-20
7176095 Bi-modal halo implantation Akif Sultan, David Wu, Wen-Jie Qi 2007-02-13
7129142 Method of forming doped regions in the bulk substrate of an SOI substrate to control the operational characteristics of transistors formed thereabove, and an integrated circuit device comprising same Derick J. Wristers, Andy Wei 2006-10-31
6919236 Biased, triple-well fully depleted SOI structure, and various methods of making and operating same Andy Wei, Derick J. Wristers 2005-07-19
6884702 Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate Andy Wei, Derick J. Wristers 2005-04-26
6876037 Fully-depleted SOI device Andy Wei, Derick J. Wristers 2005-04-05
6806111 Semiconductor component and method of manufacture Edward E. Ehrichs 2004-10-19
6794256 Method for asymmetric spacer formation Edward E. Ehrichs, S. Doug Ray, Chad Weintraub, James F. Buller 2004-09-21
6780686 Doping methods for fully-depleted SOI structures, and device comprising the resulting doped regions Andy Wei, Derick J. Wristers 2004-08-24
6737332 Semiconductor device formed over a multiple thickness buried oxide layer, and methods of making same Derick J. Wristers, Andy Wei 2004-05-18
6583016 Doped spacer liner for improved transistor performance Andy Wei, Ping-Chin Yeh 2003-06-24
6570228 Method and apparatus for electrically measuring insulating film thickness Roger Thomas Williams, Michael Fenske 2003-05-27
6463570 Apparatus and method for verifying process integrity Michael J. Dunn 2002-10-08
6426262 Method of analyzing the effects of shadowing of angled halo implants Jon D. Cheek, Frederick N. Hause, Marilyn I. Wright 2002-07-30
6410350 Detecting die speed variations Stephen Doug Ray, Michael J. Dunn, Roger Thomas Williams, Michael Fenske 2002-06-25
6287877 Electrically quantifying transistor spacer width Roger Thomas Williams, Michael Fenske 2001-09-11