Issued Patents All Time
Showing 25 most recent of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10262905 | Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Qing Liu, Nicolas Loubet | 2019-04-16 |
| 10186524 | Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions | David Pritchard, Lixia Lei, Deniz E. Civay, Neha Nayyar | 2019-01-22 |
| 10181522 | Simplified gate to source/drain region connections | Tuhin Guha Neogi, David Pritchard, Kasun Anupama Punchihewa | 2019-01-15 |
| 10068806 | Method, apparatus, and system for using a cover mask for enabling metal line jumping over MOL features in a standard cell | David Pritchard, Tuhin Guha Neogi, David Doman | 2018-09-04 |
| 9947590 | Method, apparatus, and system for using a cover mask for enabling metal line jumping over MOL features in a standard cell | David Pritchard, Tuhin Guha Neogi, David Doman | 2018-04-17 |
| 9941301 | Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions | David Pritchard, Lixia Lei, Deniz E. Civay, Neha Nayyar | 2018-04-10 |
| 9666488 | Pass-through contact using silicide | Tuhin Guha Neogi, David Pritchard, Guillaume Bouche, David Doman | 2017-05-30 |
| 9633911 | Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Qing Liu, Nicolas Loubet | 2017-04-25 |
| 9373548 | CMOS circuit having a tensile stress layer overlying an NMOS transistor and overlapping a portion of compressive stress layer | Gen Pei, Johannes M. van Meer | 2016-06-21 |
| 9219078 | Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Qing Liu, Nicolas Loubet | 2015-12-22 |
| 9048136 | SRAM cell with individual electrical device threshold control | Randy W. Mann | 2015-06-02 |
| 9029956 | SRAM cell with individual electrical device threshold control | Randy W. Mann | 2015-05-12 |
| 8912603 | Semiconductor device with stressed fin sections | Frank Scott Johnson | 2014-12-16 |
| 8404592 | Methods for fabricating FinFET semiconductor devices using L-shaped spacers | Frank Scott Johnson | 2013-03-26 |
| 8193592 | MOSFET with asymmetrical extension implant | Frank Bin Yang, Andrew Waite | 2012-06-05 |
| 8148214 | Stressed field effect transistor and methods for its fabrication | Andrew Waite | 2012-04-03 |
| 8120120 | Embedded silicon germanium source drain structure with reduced silicide encroachment and contact resistance and enhanced channel mobility | Frank (Bin) Yang, Johan W. Weijtmans | 2012-02-21 |
| 8039349 | Methods for fabricating non-planar semiconductor devices having stress memory | Michael Hargrove, Frank Scott Johnson | 2011-10-18 |
| 8030144 | Semiconductor device with stressed fin sections, and related fabrication methods | Frank Scott Johnson | 2011-10-04 |
| 7977174 | FinFET structures with stress-inducing source/drain-forming spacers and methods for fabricating the same | Frank Scott Johnson, Michael Hargrove | 2011-07-12 |
| 7960229 | Metal oxide semiconductor transistor with reduced gate height, and related fabrication methods | Frank Bin Yang, Rohit Pal | 2011-06-14 |
| 7910996 | Semiconductor device and method of manufacturing a semiconductor device | Paul R. Besser | 2011-03-22 |
| 7893493 | Stacking fault reduction in epitaxially grown silicon | Yun-Yu Wang, Linda Black, Judson R. Holt, Woo-Hyeong Lee, Christopher D. Sheraw | 2011-02-22 |
| 7829401 | MOSFET with asymmetrical extension implant | Frank Bin Yang, Andrew Waite | 2010-11-09 |
| 7674720 | Stacking fault reduction in epitaxially grown silicon | Yun-Yu Wang, Linda Black, Judson R. Holt, Woo-Hyeong Lee, Christopher D. Sheraw | 2010-03-09 |