Gen Pei — 9 Patents at AMD | Patent Leaderboard

Gen Pei has been granted 9 US patents while listed as an inventor at AMD. The first was granted in 2008 and the most recent in June 2016. Gen Pei ranks #535,341 of 4,157,543 US inventors in our database (top 12.9%). Patent records list Gen Pei in Yorktown Heights, NY, US.

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
9373548	CMOS circuit having a tensile stress layer overlying an NMOS transistor and overlapping a portion of compressive stress layer	Scott Luning, Johannes M. van Meer	2016-06-21	$2,461,000
8400854	Identifying at-risk data in non-volatile storage	Lanlan Gu, Nima Mokhlesi, Idan Alrod, Eran Sharon, Itshak Afriat	2013-03-19	$19,973,000
8012820	Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension	Amlan Majumdar, Zhibin Ren, Dinkar Singh, Jeffrey W. Sleight	2011-09-06
7943999	Stress enhanced MOS circuits	—	2011-05-17	$9,308,000
7816767	Negative differential resistance diode and SRAM utilizing such device	Zoran Krivokapic	2010-10-19	$4,223,000
7508050	Negative differential resistance diode and SRAM utilizing such device	Zoran Krivokapic	2009-03-24	$18,186,000
7442601	Stress enhanced CMOS circuits and methods for their fabrication	Scott Luning, Johannes M. van Meer	2008-10-28	$5,544,000
7439120	Method for fabricating stress enhanced MOS circuits	—	2008-10-21	$8,102,000
7416931	Methods for fabricating a stress enhanced MOS circuit	—	2008-08-26	$4,862,000

Gen Pei — 9 Patents

Issued Patents All Time

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