| 8652913 |
Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium loss |
Maciej Wiatr, Andy Wei, Thorsten Kammler, Roman Boschke, Casey Scott |
2014-02-18 |
| 8530894 |
Test structure for monitoring process characteristics for forming embedded semiconductor alloys in drain/source regions |
Anthony Mowry, Casey Scott, Vassilios Papageorgiou, Andy Wei, Markus Lenski |
2013-09-10 |
| 8394314 |
Method for producing a component provided with a multipart cover layer and said component |
Claus Heinz, Bernhard Baumann, Andreas Meyer, Sebastien Baumont, Godefroy Beau +2 more |
2013-03-12 |
| 8377761 |
SOI device having a substrate diode with process tolerant configuration and method of forming the SOI device |
Jan Hoentschel, Andy Wei |
2013-02-19 |
| 8298924 |
Method for differential spacer removal by wet chemical etch process and device with differential spacer structure |
Maciej Wiatr, Frank Wirbeleit, Andy Wei |
2012-10-30 |
| 8227266 |
Test structure for monitoring process characteristics for forming embedded semiconductor alloys in drain/source regions |
Anthony Mowry, Casey Scott, Vassilios Papageorgiou, Andy Wei, Markus Lenski |
2012-07-24 |
| 8183605 |
Reducing transistor junction capacitance by recessing drain and source regions |
Thomas Feudel, Markus Lenski |
2012-05-22 |
| 8129236 |
Method for creating tensile strain by applying stress memorization techniques at close proximity to the gate electrode |
Anthony Mowry, Andy Wei |
2012-03-06 |
| 8093634 |
In situ formed drain and source regions in a silicon/germanium containing transistor device |
Anthony Mowry, Andy Wei, Casey Scott |
2012-01-10 |
| 7943442 |
SOI device having a substrate diode with process tolerant configuration and method of forming the SOI device |
Jan Hoentschel, Andy Wei |
2011-05-17 |
| 7939399 |
Semiconductor device having a strained semiconductor alloy concentration profile |
Anthony Mowry, Bernhard Trui, Maciej Wiatr, Andy Wei |
2011-05-10 |
| 7897451 |
Method for creating tensile strain by selectively applying stress memorization techniques to NMOS transistors |
Maciej Wiatr, Casey Scott, Peter Javorka, Andy Wei |
2011-03-01 |
| 7875336 |
Method for producing a component, a tool for carrying out said method and the component |
Claus Heinz, Bernhard Bauman, Andreas Meyer, Torsten Köhler, Sebastien Baumont +3 more |
2011-01-25 |
| 7816199 |
Method of forming a semiconductor structure comprising an implantation of ions of a non-doping element |
Thomas Feudel, Manfred Horstmann |
2010-10-19 |
| 7790537 |
Method for creating tensile strain by repeatedly applied stress memorization techniques |
Andy Wei, Anthony Mowry, Maciej Wiatr |
2010-09-07 |
| 7772077 |
Method of forming a semiconductor structure comprising a field effect transistor having a stressed channel region |
Andy Wei, Anthony Mowry, Manuj Rathor |
2010-08-10 |
| 7763505 |
Method for reducing crystal defects in transistors with re-grown shallow junctions by appropriately selecting crystalline orientations |
Markus Lenski, Jan Hoentschel, Thorsten Kammler |
2010-07-27 |
| 7754556 |
Reducing transistor junction capacitance by recessing drain and source regions |
Thomas Feudel, Markus Lenski |
2010-07-13 |
| 7754555 |
Transistor having a channel with biaxial strain induced by silicon/germanium in the gate electrode |
Ralf van Bentum, Markus Lenski |
2010-07-13 |
| 7713763 |
Test structure for monitoring process characteristics for forming embedded semiconductor alloys in drain/source regions |
Anthony Mowry, Casey Scott, Vassilios Papageorgiou, Andy Wei, Markus Lenski |
2010-05-11 |
| 7098564 |
Work piece |
Roland Bohn, Peter Mueller |
2006-08-29 |
