Ralf van Bentum — 19 Patents at AMD

Ralf van Bentum has been granted 19 US patents while listed as an inventor at AMD. The first was granted in 2002 and the most recent in January 2017. Ralf van Bentum ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Ralf van Bentum in Radebeul, DE.

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
9536992	Semiconductor structure including a ferroelectric transistor and method for the formation thereof	Jongsin Yun, Seunghwan Seo, Joerg Schmid	2017-01-03	$6,197,000
9412600	Method of forming a semiconductor structure including a ferroelectric material and semiconductor structure including a ferroelectric transistor	Gunter Grasshoff	2016-08-09	$2,792,000
9368605	Semiconductor structure including a split gate nonvolatile memory cell and a high voltage transistor, and method for the formation thereof	Igor Lusetsky	2016-06-14	$2,204,000
9293556	Semiconductor structure including a ferroelectric transistor and method for the formation thereof	Jongsin Yun, Seunghwan Seo, Joerg Schmid	2016-03-22	$709,000
8697530	Drain/source extension structure of a field effect transistor with reduced boron diffusion	Ekkehard Pruefer, Klaus Hempel, Stephan Kruegel	2014-04-15	$4,275,000
8431455	Method of improving memory cell device by ion implantation	Nihar-Ranjan Mohapatra	2013-04-30	$3,960,000
8158486	Trench isolation structure having different stress	Klaus Hempel, Roland Stejskal	2012-04-17	$6,725,000
7754555	Transistor having a channel with biaxial strain induced by silicon/germanium in the gate electrode	Andreas Gehring, Markus Lenski	2010-07-13	$9,965,000
7528026	Method for reducing silicide defects by removing contaminants prior to drain/source activation	Markus Lenski, Ekkehard Pruefer	2009-05-05	$16,608,000
7176110	Technique for forming transistors having raised drain and source regions with different heights	Scott Luning, Thorsten Kammler	2007-02-13	$17,943,000
7144786	Technique for forming a transistor having raised drain and source regions with a reduced number of process steps	Scott Luning, Thorsten Kammler	2006-12-05	$14,281,000
7138320	Advanced technique for forming a transistor having raised drain and source regions	Scott Luning, Andy Wei	2006-11-21	$39,143,000
7064074	Technique for forming contacts for buried doped regions in a semiconductor device	Manfred Horstmann	2006-06-20	$7,818,000
6943088	Method of manufacturing a trench isolation structure for a semiconductor device with a different degree of corner rounding	Stephan Kruegel, Gert Burbach	2005-09-13	$9,865,000
6787852	Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions	Bin Yu	2004-09-07	$2,099,000
6774436	SOI MOSFET with asymmetrical source/body and drain/body junctions	Bin Yu	2004-08-10	$1,968,000
6548369	Multi-thickness silicon films on a single semiconductor-on-insulator (SOI) chip using simox	—	2003-04-15	$2,272,000
6495402	Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions and method of manufacture	Bin Yu	2002-12-17	$3,175,000
6465313	SOI MOSFET with graded source/drain silicide	Bin Yu	2002-10-15	$861,000

Ralf van Bentum — 19 Patents

Issued Patents All Time

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