Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8274120 | Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions | Andy Wei, Thorsten Kammler, Jan Hoentschel, Manfred Horstmann, Peter Javorka | 2012-09-25 |
| 8138571 | Semiconductor device comprising isolation trenches inducing different types of strain | Christoph Schwan, Peter Javorka, Manfred Horstmann, Sven Beyer, Markus Forsberg +2 more | 2012-03-20 |
| 7863171 | SOI transistor having a reduced body potential and a method of forming the same | Jan Hoentschel, Andy Wei, Manfred Horstmann | 2011-01-04 |
| 7732291 | Semiconductor device having stressed etch stop layers of different intrinsic stress in combination with PN junctions of different design in different device regions | Peter Javorka, Manfred Horstmann, Gert Burbach | 2010-06-08 |
| 7696052 | Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions | Andy Wei, Thorsten Kammler, Jan Hoentschel, Manfred Horstmann, Peter Javorka | 2010-04-13 |
| 7556996 | Field effect transistor comprising a stressed channel region and method of forming the same | Christoph Schwan, Kai Frohberg, Manfred Horstmann | 2009-07-07 |
| 7547610 | Method of making a semiconductor device comprising isolation trenches inducing different types of strain | Christoph Schwan, Peter Javorka, Manfred Horstmann, Sven Beyer, Markus Forsberg +2 more | 2009-06-16 |