Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9659928 | Semiconductor device having a high-K gate dielectric above an STI region | Andy Wei, Roman Boschke | 2017-05-23 |
| 9023712 | Method for self-aligned removal of a high-K gate dielectric above an STI region | Andy Wei, Roman Boschke | 2015-05-05 |
| 8796807 | Temperature monitoring in a semiconductor device by using a PN junction based on silicon/germanium materials | Rolf Stephan, Gert Burbach, Anthony Mowry | 2014-08-05 |
| 8334573 | Buried etch stop layer in trench isolation structures for superior surface planarity in densely packed semiconductor devices | Maciej Wiatr, Stephan Kronholz, Roman Boschke | 2012-12-18 |
| 8138571 | Semiconductor device comprising isolation trenches inducing different types of strain | Christoph Schwan, Joe Bloomquist, Peter Javorka, Manfred Horstmann, Sven Beyer +2 more | 2012-03-20 |
| 8101512 | Method of enhancing lithography capabilities during gate formation in semiconductors having a pronounced surface topography | Martin Gerhardt, Martin Trentzsch, Manfred Horstmann | 2012-01-24 |
| 8097519 | SOI device having a substrate diode formed by reduced implantation energy | Maciej Wiatr, Roman Boschke | 2012-01-17 |
| 7547610 | Method of making a semiconductor device comprising isolation trenches inducing different types of strain | Christoph Schwan, Joe Bloomquist, Peter Javorka, Manfred Horstmann, Sven Beyer +2 more | 2009-06-16 |