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Semiconductor device having a high-K gate dielectric above an STI region |
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Method for self-aligned removal of a high-K gate dielectric above an STI region |
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Temperature monitoring in a semiconductor device by using a PN junction based on silicon/germanium materials |
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Buried etch stop layer in trench isolation structures for superior surface planarity in densely packed semiconductor devices |
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2012-12-18 |
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Semiconductor device comprising isolation trenches inducing different types of strain |
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2012-03-20 |
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Method of enhancing lithography capabilities during gate formation in semiconductors having a pronounced surface topography |
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SOI device having a substrate diode formed by reduced implantation energy |
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Method of making a semiconductor device comprising isolation trenches inducing different types of strain |
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