Issued Patents All Time
Showing 25 most recent of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12113070 | Transistor integration on a silicon-on-insulator substrate | Viorel Ontalus, Ketankumar Harishbhai Tailor, Michael Zier, Crystal R. Kenney, Judson R. Holt | 2024-10-08 |
| 11916109 | Bipolar transistor structures with base having varying horizontal width and methods to form same | Alexander M. Derrickson, Ketankumar Harishbhai Tailor, Zhixing Zhao, Judson R. Holt | 2024-02-27 |
| 11888062 | Extended-drain metal-oxide-semiconductor devices with a silicon-germanium layer beneath a portion of the gate | Felix Holzmüller, Ruchil Kumar Jain | 2024-01-30 |
| 11705455 | High voltage extended drain MOSFET (EDMOS) devices in a high-k metal gate (HKMG) | Thorsten Kammler | 2023-07-18 |
| 11532742 | Integrated circuit structure with metal gate and metal field plate having coplanar upper surfaces | Ketankumar Harishbhai Tailor | 2022-12-20 |
| 11456364 | Structure and method to provide conductive field plate over gate structure | Ketankumar Harishbhai Tailor, Ruchil Kumar Jain | 2022-09-27 |
| 11289598 | Co-integrated high voltage (HV) and medium voltage (MV) field effect transistors | Nan Wu, Thorsten Kammler | 2022-03-29 |
| 11217678 | Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dual raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI | George R. Mulfinger, Ryan Sporer, Rick Carter, Hans-Jürgen Thees, Jan Höntschel | 2022-01-04 |
| 11195935 | Semiconductor device with novel spacer structures having novel configurations | Hans-Juergen Thees | 2021-12-07 |
| 10923579 | Semiconductor device with interconnect to source/drain | Hans-Juergen Thees, Elliot John Smith | 2021-02-16 |
| 10727236 | Circuits constructed from stacked field-effect transistors | Nan Wu | 2020-07-28 |
| 10707330 | Semiconductor device with interconnect to source/drain | Hans-Juergen Thees, Elliot John Smith | 2020-07-07 |
| 10522655 | Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dial raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI | George R. Mulfinger, Ryan Sporer, Rick Carter, Hans-Jürgen Thees, Jan Höntschel | 2019-12-31 |
| 10475901 | Cap removal for gate electrode structures with reduced complexity | Hans-Juergen Thees | 2019-11-12 |
| 10418364 | Semiconductor device structure with self-aligned capacitor device | Hans-Jürgen Thees | 2019-09-17 |
| 10347543 | FDSOI semiconductor device with contact enhancement layer and method of manufacturing | Rick Carter, Vikrant Chauhan, George Jonathan Kluth, Anurag Mittal, David Pritchard +1 more | 2019-07-09 |
| 10224251 | Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode lines | Hans-Peter Moll, Gunter Grasshoff | 2019-03-05 |
| 10157774 | Contact scheme for landing on different contact area levels | Carsten Peters | 2018-12-18 |
| 10103067 | Semiconductor device comprising trench isolation | Gunter Grasshoff, Rico Hueselitz | 2018-10-16 |
| 10079300 | Semiconductor circuit element | Carsten Grass | 2018-09-18 |
| 10062619 | Air gap spacer implant for NZG reliability fix | Hans-Juergen Thees | 2018-08-28 |
| 10056369 | Semiconductor device including buried capacitive structures and a method of forming the same | Frank Jakubowski | 2018-08-21 |
| 10032891 | FinFET based flash memory cell | Juergen Faul | 2018-07-24 |
| 9960184 | FDSOI-capacitor | Jan Hoentschel, Hans-Peter Moll | 2018-05-01 |
| 9929148 | Semiconductor device including buried capacitive structures and a method of forming the same | Frank Jakubowski | 2018-03-27 |