Issued Patents All Time
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12266718 | Voltage-controlled switching device with channel region | Alim Karmous, Anton Mauder | 2025-04-01 |
| 12087816 | Power semiconductor device having a control cell for controlling a load current | Stefan Loesch, Marc Probst, Tom Richter, Olaf Storbeck | 2024-09-10 |
| 11742417 | Power semiconductor device including first and second trench structures | Thorsten Arnold, Roman Baburske, Ilaria Imperiale, Alexander Philippou | 2023-08-29 |
| 11728420 | Mesa contact for a power semiconductor device and method of producing a power semiconductor device | Anton Mauder | 2023-08-15 |
| 11322587 | Method of processing a power semiconductor device | Stefan Loesch, Marc Probst, Tom Richter, Olaf Storbeck | 2022-05-03 |
| 11195935 | Semiconductor device with novel spacer structures having novel configurations | Peter Baars | 2021-12-07 |
| 11195942 | Semiconductor device including electrode trench structure and isolation trench structure and manufacturing method therefore | Anton Mauder | 2021-12-07 |
| 10971599 | Power semiconductor device with self-aligned source region | — | 2021-04-06 |
| 10923579 | Semiconductor device with interconnect to source/drain | Peter Baars, Elliot John Smith | 2021-02-16 |
| 10707330 | Semiconductor device with interconnect to source/drain | Peter Baars, Elliot John Smith | 2020-07-07 |
| 10475901 | Cap removal for gate electrode structures with reduced complexity | Peter Baars | 2019-11-12 |
| 10062619 | Air gap spacer implant for NZG reliability fix | Peter Baars | 2018-08-28 |
| 9953876 | Method of forming a semiconductor device structure and semiconductor device structure | Elliot John Smith | 2018-04-24 |
| 9793294 | Junction formation with reduced Ceff for 22nm FDSOI devices | Peter Baars | 2017-10-17 |
| 9761689 | Method of forming a semiconductor device and according semiconductor device | Dominic Thurmer, Kai Frohberg, Peter Moll, Heike Scholz | 2017-09-12 |
| 9673210 | Semiconductor structure including a nonvolatile memory cell having a charge trapping layer and method for the formation thereof | Peter Baars, Joerg Schmid | 2017-06-06 |
| 9634017 | Semiconductor structure including a nonvolatile memory cell and method for the formation thereof | Peter Baars | 2017-04-25 |
| 9634088 | Junction formation with reduced CEFF for 22NM FDSOI devices | Peter Baars | 2017-04-25 |
| 9372392 | Reticles for use in forming implant masking layers and methods of forming implant masking layers | Martin Mazur, Dietmar Henke | 2016-06-21 |
| 9281200 | Enhanced patterning uniformity of gate electrodes of a semiconductor device by late gate doping | Sven Beyer, Martin Mazur, Steffen Laufer | 2016-03-08 |
| 9214463 | Methods of forming metal silicide regions on a semiconductor device | Peter Baars | 2015-12-15 |
| 8987144 | High-K metal gate electrode structures formed by cap layer removal without sacrificial spacer | Stephan Kronholz, Markus Lenski | 2015-03-24 |
| 8859356 | Method of forming metal silicide regions on a semiconductor device | Peter Baars | 2014-10-14 |
| 8802360 | Reticles for use in forming implant masking layers and methods of forming implant masking layers | Martin Mazur, Henke Dietmar | 2014-08-12 |
| 8796080 | Methods of epitaxially forming materials on transistor devices | Stephan Kronholz, Peter Javorka | 2014-08-05 |