Issued Patents All Time
Showing 25 most recent of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11850716 | Drill for chiselling rock | Klaus-Peter Bohn, Roland Foser, Markus Hartmann, Bastian Pluemacher | 2023-12-26 |
| 11577429 | Manufacturing process, tool stand, and drill bit | Guenter DOMANI, Florian SCHROEDER | 2023-02-14 |
| 11213939 | Chisel | Zsolt Kosa, Aviral Shrot, Attila Kenez | 2022-01-04 |
| 11123855 | Control method and borehole flushing module | Markus Hartmann, Klaus-Peter Bohn, Bastian Pluemacher, Michael Brunner, Helene Wesseler | 2021-09-21 |
| 11031406 | Semiconductor devices having silicon/germanium active regions with different germanium concentrations | Elliot John Smith, Gunter Grasshoff | 2021-06-08 |
| 10940527 | Manufacturing process, tool stand, and drill bit | Guenter DOMANI, Florian SCHROEDER | 2021-03-09 |
| 10906166 | Control method and portable power tool | Helene Wesseler, Markus Hartmann, Klaus-Peter Bohn, Thilo Hammers, Bastian Pluemacher | 2021-02-02 |
| 10522555 | Semiconductor devices including Si/Ge active regions with different Ge concentrations | Elliot John Smith, Gunter Grasshoff | 2019-12-31 |
| 10483154 | Front-end-of-line device structure and method of forming such a front-end-of-line device structure | Elliot John Smith, Marcus Wolf, Markus Lenski, Loic Gaben | 2019-11-19 |
| 10252321 | Twist drill and production method | Corinna Achleitner, Mark Winkler, Guenter DOMANI | 2019-04-09 |
| 10245657 | Twist drill and production method | Corinna Achleitner, Guenter DOMANI, Mark Winkler | 2019-04-02 |
| 10157774 | Contact scheme for landing on different contact area levels | Peter Baars | 2018-12-18 |
| 9305878 | Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects | Torsten Huisinga, Andreas Ott, Axel Preusse | 2016-04-05 |
| 9257329 | Methods for fabricating integrated circuits including densifying interlevel dielectric layers | Oliver Mieth, Torsten Huisinga | 2016-02-09 |
| 8932911 | Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects | Torsten Huisinga, Andreas Ott, Axel Preusse | 2015-01-13 |
| 8772154 | Integrated circuits including barrier polish stop layers and methods for the manufacture thereof | Egon Ronny Pfützner, Jens Heinrich | 2014-07-08 |
| 8580684 | Contact elements of semiconductor devices comprising a continuous transition to metal lines of a metallization layer | Robert Seidel, Kai Frohberg | 2013-11-12 |
| 8293641 | Nano imprint technique with increased flexibility with respect to alignment and feature shaping | Robert Seidel, Frank Feustel | 2012-10-23 |
| 8173538 | Method of selectively forming a conductive barrier layer by ALD | Frank Feustel, Thomas Foltyn | 2012-05-08 |
| 7998823 | Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process | Kai Frohberg, Ralf Richter | 2011-08-16 |
| 7928004 | Nano imprint technique with increased flexibility with respect to alignment and feature shaping | Robert Seidel, Frank Feustel | 2011-04-19 |
| 7915170 | Reducing contamination of semiconductor substrates during beol processing by providing a protection layer at the substrate edge | Su Ruo Qing, Frank Feustel | 2011-03-29 |
| 7910496 | Technique for forming an interlayer dielectric material of increased reliability above a structure including closely spaced lines | Frank Feustel, Kai Frohberg | 2011-03-22 |
| 7906815 | Increased reliability for a contact structure to connect an active region with a polysilicon line | Ralf Richter, Kai Frohberg | 2011-03-15 |
| 7902581 | Semiconductor device comprising a contact structure based on copper and tungsten | Kai Frohberg, Thomas Werner | 2011-03-08 |