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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
PK

Paul L. King — 34 Patents

AMD: 30 patents #330 of 9,280Top 4%
ITInternational Telephone And Telegraph: 2 patents #96 of 507Top 20%
CFCornell Research Foundation: 1 patents #802 of 1,638Top 50%
Stockholm, WI: #1 of 3 inventorsTop 35%
Wisconsin: #823 of 40,088 inventorsTop 3%
Overall (All Time): #100,737 of 4,157,543Top 3%
34 Patents All Time
Paul L. King has been granted 34 US patents while listed as an inventor at AMD. The first was granted in 1980 and the most recent in July 2010. Paul L. King ranks #100,737 of 4,157,543 US inventors in our database (top 2.4%). Patent records list Paul L. King in Stockholm, WI, US.

Patents per Year

Patents granted per year, 1980 to 2010Bar chart with a peak of 10 patents in 2002.peak 101980: 1 patents19801983: 1 patents19831987: 1 patents19872001: 2 patents20012002: 10 patents20022003: 9 patents20032004: 3 patents20042006: 5 patents20062007: 1 patents20072010: 1 patents2010

Issued Patents All Time

Showing 1–25 of 34 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7755194 Composite barrier layers with controlled copper interface surface roughness Amit P. Marathe, Connie P. Wang, Christy Mei-Chu Woo 2010-07-13 $9,965,000
7250667 Selectable open circuit and anti-fuse element Darin A. Chan, Simon S. Chan 2007-07-31 $9,995,000
7151020 Conversion of transition metal to silicide through back end processing in integrated circuit technology Jeffrey P. Patton, Austin Frenkel, Thorsten Kammler, Robert J. Chiu, Errol Todd Ryan +3 more 2006-12-19 $26,185,000
7064067 Reduction of lateral silicide growth in integrated circuit technology Simon S. Chan, Jeffrey P. Patton, Minh Van Ngo 2006-06-20 $7,818,000
7033940 Method of forming composite barrier layers with controlled copper interface surface roughness Amit P. Marathe, Connie P. Wang, Christy Mei-Chu Woo 2006-04-25 $9,950,000
7015076 Selectable open circuit and anti-fuse element, and fabrication method therefor Darin A. Chan, Simon S. Chan 2006-03-21 $13,217,000
7005357 Low stress sidewall spacer in integrated circuit technology Minh Van Ngo, Simon S. Chan, Paul R. Besser, Errol Todd Ryan, Robert J. Chiu 2006-02-28 $11,043,000
6784506 Silicide process using high K-dielectrics Qi Xiang, Paul R. Besser, Matthew S. Buynoski, John Foster, Eric N. Paton 2004-08-31 $2,273,000
6764912 Passivation of nitride spacer John Foster, Eric N. Paton, Matthew S. Buynoski, Qi Xiang, Paul R. Besser 2004-07-20 $1,607,000
6717236 Method of reducing electromigration by forming an electroplated copper-zinc interconnect and a semiconductor device thereby formed Sergey Lopatin, Alexander H. Nickel 2004-04-06 $3,021,000
6630741 Method of reducing electromigration by ordering zinc-doping in an electroplated copper-zinc interconnect and a semiconductor device thereby formed Sergey Lopatin, Joffre F. Bernard 2003-10-07 $3,893,000
6624074 Method of fabricating a semiconductor device by calcium doping a copper surface using a chemical solution Sergey Lopatin, Joffre F. Bernard 2003-09-23 $3,430,000
6621165 Semiconductor device fabricated by reducing carbon, sulphur, and oxygen impurities in a calcium-doped copper surface Sergey Lopatin, Joffre F. Bernard 2003-09-16
6610181 Method of controlling the formation of metal layers Paul R. Besser, Susan Kim 2003-08-26 $4,773,000
6611576 Automated control of metal thickness during film deposition Paul R. Besser 2003-08-26 $4,773,000
6605513 Method of forming nickel silicide using a one-step rapid thermal anneal process and backend processing Eric N. Paton, Ercan Adem, Jacques Bertrand, Paul R. Besser, Matthew S. Buynoski +4 more 2003-08-12 $3,677,000
6602781 Metal silicide gate transistors Qi Xiang, Paul R. Besser, Matthew S. Buynoski, John Foster, Eric N. Paton 2003-08-05 $3,941,000
6562718 Process for forming fully silicided gates Qi Xiang, Ercan Adem, Jacques Bertrand, Paul R. Besser, Matthew S. Buynoski +5 more 2003-05-13 $1,759,000
6559051 Electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors Matthew S. Buynoski, Paul R. Besser, Eric N. Paton, Qi Xang 2003-05-06 $2,132,000
6475874 Damascene NiSi metal gate high-k transistor Qi Xiang, Paul R. Besser, Matthew S. Buynoski, John Foster, Eric N. Paton 2002-11-05 $1,578,000
6469387 Semiconductor device formed by calcium doping a copper surface using a chemical solution Sergey Lopatin, Joffre F. Bernard 2002-10-22 $2,399,000
6465334 Enhanced electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors Matthew S. Buynoski, Paul R. Besser, Eric N. Paton, Qi Xiang 2002-10-15 $861,000
6465309 Silicide gate transistors Qi Xiang, Paul R. Besser, Matthew S. Buynoski, John Foster, Eric N. Paton 2002-10-15 $861,000
6458679 Method of making silicide stop layer in a damascene semiconductor structure Eric N. Paton, Paul R. Besser, Matthew S. Buynoski, Qi Xiang, John Foster 2002-10-01 $734,000
6444580 Method of reducing carbon, sulphur, and oxygen impurities in a calcium-doped copper surface and semiconductor device thereby formed Sergey Lopatin, Joffre F. Bernard 2002-09-03 $1,843,000