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USPTO Patent Rankings Data through Dec 31, 2025
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Eric N. Paton — 74 Patents

AMD: 70 patents #68 of 9,280Top 1%
Globalfoundries: 3 patents #1,029 of 4,424Top 25%
SLSpansion Llc.: 2 patents #309 of 769Top 45%
Applied Materials: 1 patents #4,824 of 7,310Top 70%
California: #4,029 of 386,348 inventorsTop 2%
Overall (All Time): #26,215 of 4,157,543Top 1%
74 Patents All Time
Eric N. Paton has been granted 74 US patents while listed as an inventor at AMD. The first was granted in 2000 and the most recent in January 2011. Eric N. Paton ranks #26,215 of 4,157,543 US inventors in our database (top 0.63%). Patent records list Eric N. Paton in معلمی نژاد, CA, US.

Issued Patents All Time

Showing 1–25 of 74 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7863175 Zero interface polysilicon to polysilicon gate for flash memory Robert B. Ogle, Joong S. Jeon, Austin Frenkel 2011-01-04
7713834 Method of forming isolation regions for integrated circuits Haihong Wang, Minh Van Ngo, Qi Xiang, Paul R. Besser, Ming-Ren Lin 2010-05-11 $11,612,000
7648886 Shallow trench isolation process Minh Van Ngo, Qi Xiang, Paul R. Besser, Ming-Ren Lin 2010-01-19 $30,644,000
7456062 Method of forming a semiconductor device William G. En, Thorsten Kammler, Paul R. Besser, Simon S. Chan 2008-11-25 $3,883,000
7422961 Method of forming isolation regions for integrated circuits Haihong Wang, Minh Van Ngo, Qi Xiang, Paul R. Besser, Ming-Ren Lin 2008-09-09 $8,320,000
7402485 Method of forming a semiconductor device William G. En, Thorsten Kammler, Scott Luning 2008-07-22 $4,320,000
7402207 Method and apparatus for controlling the thickness of a selective epitaxial growth layer Paul R. Besser, William G. En 2008-07-22 $4,320,000
7351638 Scanning laser thermal annealing Cyrus E. Tabery, Bin Yu, Qi Xiang, Robert B. Ogle 2008-04-01 $18,550,000
7312125 Fully depleted strained semiconductor on insulator transistor and method of making the same Qi Xiang, Paul R. Besser, Minh Van Ngo, Haihong Wang 2007-12-25
7298012 Shallow junction semiconductor Mario M. Pelella, William G. En, Witold P. Maszara 2007-11-20 $5,989,000
7256141 Interface layer between dual polycrystalline silicon layers Mark T. Ramsbey, Weidong Qian, Mark S. Chang 2007-08-14
7241700 Methods for post offset spacer clean for improved selective epitaxy silicon growth William G. En, Scott Luning 2007-07-10 $17,592,000
7211489 Localized halo implant region formed using tilt pre-amorphization implant and laser thermal anneal Qi Xiang, Robert B. Ogle, Cyrus E. Tabery, Bin Yu 2007-05-01 $26,379,000
7091097 End-of-range defect minimization in semiconductor device Qi Xiang, Cyrus E. Tabery, Bin Yu, Robert B. Ogle 2006-08-15 $18,169,000
7071065 Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication Qi Xiang, Haihong Wang 2006-07-04
7033916 Shallow junction semiconductor and method for the fabrication thereof Mario M. Pelella, William G. En, Witold P. Maszara 2006-04-25 $9,950,000
6966235 Remote monitoring of critical parameters for calibration of manufacturing equipment and facilities 2005-11-22
6967160 Method of manufacturing semiconductor device having nickel silicide with reduced interface roughness Paul R. Besser, Simon S. Chan, Fred N. Hause 2005-11-22 $6,256,000
6962857 Shallow trench isolation process using oxide deposition and anneal Minh Van Ngo, Ming-Ren Lin, Haihong Wang, Qi Xiang, Jung-Suk Goo 2005-11-08 $6,799,000
6924182 Strained silicon MOSFET having reduced leakage and method of its formation Qi Xiang, Ming-Ren Lin, Minh Van Ngo, Haihong Wang 2005-08-02 $7,108,000
6921709 Front side seal to prevent germanium outgassing Haihong Wang, Qi Xiang 2005-07-26 $17,204,000
6905923 Offset spacer process for forming N-type transistors Haihong Wang, Qi Xiang 2005-06-14 $5,811,000
6902966 Low-temperature post-dopant activation process Bin Yu, Robert B. Ogle, Cyrus E. Tabery, Qi Xiang 2005-06-07 $8,078,000
6878592 Selective epitaxy to improve silicidation Paul R. Besser, Minh Van Ngo, Qi Xiang 2005-04-12 $6,806,000
6878559 Measurement of lateral diffusion of diffused layers Peter G. Borden, G. Jonathan Kluth 2005-04-12