Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12228930 | Aircraft docking guidance system using 3D laser scanner and control method for the same | Yeong-Woong Jeon, Im-Roc Do, Yong An Lee | 2025-02-18 |
| 9318573 | Field effect transistor having germanium nanorod and method of manufacturing the same | Chang-wook Moon, Jung-hyun Lee, Nae-In Lee, Yeon-Sik Park, Hwa-Sung Rhee +3 more | 2016-04-19 |
| 8809936 | Memory cell system with multiple nitride layers | Lei Xue, Rinji Sugino, Youseok Suh, Hidehiko Shiraiwa, Meng Ding +1 more | 2014-08-19 |
| 8460990 | CMOS transistor using germanium condensation and method of fabricating the same | Jun-youn Kim | 2013-06-11 |
| 8232613 | Germanium silicide layer including vanadium, platinum, and nickel | Chang-wook Moon, Hyun-deok Yang, Hwa-Sung Rhee, Nae-In Lee, Weiwei Chen | 2012-07-31 |
| 8193030 | Methods of fabricating non-volatile memory devices having carbon nanotube layer and passivation layer | Chang-wook Moon, El Mostafa Bourim, Hyun-deok Yang | 2012-06-05 |
| 8115264 | Semiconductor device having a metal gate with a low sheet resistance and method of fabricating metal gate of the same | Sung Ho Park, Jin-seo Noh | 2012-02-14 |
| 7902011 | Method of fabricating Schottky barrier transistor | Sung Ho Park, Jin-seo Noh, Eun-ju Bae | 2011-03-08 |
| 7884410 | Nonvolatile memory devices and methods of fabricating the same | Chang-wook Moon, El Mostafa Bourim, Hyun-deok Yang | 2011-02-08 |
| 7863128 | Non-volatile memory device with improved erase speed | Takashi Orimoto, Robert B. Ogle, Harpreet Sachar, Wei Zheng | 2011-01-04 |
| 7863142 | Method of forming a germanium silicide layer, semiconductor device including the germanium silicide layer, and method of manufacturing the semiconductor device | Chang-wook Moon, Hyun-deok Yang, Hwa-Sung Rhee, Nae-In Lee, Weiwei Chen | 2011-01-04 |
| 7863175 | Zero interface polysilicon to polysilicon gate for flash memory | Robert B. Ogle, Eric N. Paton, Austin Frenkel | 2011-01-04 |
| 7800186 | Semiconductor device and method of fabricating metal gate of the same | Sung Ho Park, Jin-seo Noh | 2010-09-21 |
| 7674665 | Method of fabricating Schottky barrier transistor | Sung Ho Park, Jin-seo Noh, Eun-ju Bae | 2010-03-09 |
| 7468296 | Thin film germanium diode with low reverse breakdown | Ercan Adem, Matthew S. Buynoski, Robert J. Chiu, Bryan K. Choo, Calvin T. Gabriel +5 more | 2008-12-23 |
| 7446369 | SONOS memory cell having high-K dielectric | Takashi Orimoto, Hidehiko Shiraiwa, Simon S. Chan, Harpreet Sachar | 2008-11-04 |
| 7365389 | Memory cell having enhanced high-K dielectric | Wei Zheng, Mark Randolph, Meng Ding, Hidehiko Shiraiwa | 2008-04-29 |
| 7294547 | SONOS memory cell having a graded high-K dielectric | Takashi Orimoto | 2007-11-13 |
| 7232724 | Radical oxidation for bitline oxide of SONOS | Hidehiko Shiraiwa, Weidong Qian | 2007-06-19 |
| 7196008 | Aluminum oxide as liner or cover layer to spacers in memory device | Hidehiko Shiraiwa, Satoshi Torii, Jaeyong Park | 2007-03-27 |
| 7176531 | CMOS gates formed by integrating metals having different work functions and having a high-k gate dielectric | Qi Xiang, Huicai Zhong, Jung-Suk Goo, Allison Holbrook, George Jonathan Kluth | 2007-02-13 |
| 7071051 | Method for forming a thin, high quality buffer layer in a field effect transistor and related structure | Robert Clark-Phelps, Qi Xiang, Huicai Zhong | 2006-07-04 |
| 7033894 | Method for modulating flatband voltage of devices having high-k gate dielectrics by post-deposition annealing | Huicai Zhong | 2006-04-25 |
| 7026211 | Semiconductor component and method of manufacture | Rinji Sugino, Robert B. Ogle | 2006-04-11 |
| 6992370 | Memory cell structure having nitride layer with reduced charge loss and method for fabricating same | George Jonathan Kluth, Robert Clark-Phelps, Huicai Zhong, Arvind Halliyal, Mark T. Ramsbey +3 more | 2006-01-31 |