SD

Srikanteswara Dakshina-Murthy

AM AMD: 74 patents #57 of 9,279Top 1%
Globalfoundries: 3 patents #1,029 of 4,424Top 25%
HU Hussmann: 1 patents #92 of 167Top 60%
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SL Spansion Llc.: 1 patents #435 of 769Top 60%
🗺 Texas: #725 of 125,132 inventorsTop 1%
Overall (All Time): #23,350 of 4,157,543Top 1%
79
Patents All Time

Issued Patents All Time

Showing 1–25 of 79 patents

Patent #TitleCo-InventorsDate
8629535 Mask for forming integrated circuit Richard J. Huang, Scott A. Bell, Philip A. Fisher, Richard Nguyen, Cyrus E. Tabery +1 more 2014-01-14
8547521 Systems and methods that control liquid temperature in immersion lithography to maintain temperature gradient to reduce turbulence Bhanwar Singh, Ramkumar Subramanian 2013-10-01
8007631 System and method for imprint lithography to facilitate dual damascene integration with two imprint acts Bhanwar Singh, Ramkumar Subramanian 2011-08-30
7915160 Methods for forming small contacts Cyrus E. Tabery, Chih-Yuh Yang, Bin Yu 2011-03-29
7795046 Method and apparatus for monitoring endcap pullback Chew Hoe Ang 2010-09-14
7737021 Resist trim process to define small openings in dielectric layers Paul R. Besser, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl, Jeremy I. Martin +2 more 2010-06-15
7709373 System and method for imprint lithography to facilitate dual damascene integration in a single imprint act Bhanwar Singh, Khoi A. Phan 2010-05-04
7604903 Mask having sidewall absorbers to enable the printing of finer features in nanoprint lithography (1XMASK) Bhanwar Singh, Khoi A. Phan, Bharath Rangarajan, Ramkumar Subramanian 2009-10-20
7521304 Method for forming integrated circuit Richard J. Huang, Scott A. Bell, Philip A. Fisher, Richard Nguyen, Cyrus E. Tabery +1 more 2009-04-21
7449348 Feedback control of imprint mask feature profile using scatterometry and spacer etchback Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan 2008-11-11
7432558 Formation of semiconductor devices to achieve <100> channel orientation Shibly S. Ahmed, Judy Xilin An, Cyrus E. Tabery, Bin Yu 2008-10-07
7405032 Combination of non-lithographic shrink techniques and trim process for gate formation and line-edge roughness reduction Gilles Amblard, Bhanwar Singh 2008-07-29
7384569 Imprint lithography mask trimming for imprint mask using etch Bhanwar Singh, Ramkumar Subramanian 2008-06-10
7386162 Post fabrication CD modification on imprint lithography mask Bhanwar Singh, Ramkumar Subramanian 2008-06-10
7381278 Using supercritical fluids to clean lenses and monitor defects Ramkumar Subramanian, Bhanwar Singh, Khoi A. Phan 2008-06-03
7376259 Topography compensation of imprint lithography patterning Bhanwar Singh, Ramkumar Subramanian 2008-05-20
7279386 Method for forming a semiconductor arrangement with gate sidewall spacers of specific dimensions Mark Kelling, Douglas J. Bonser, Asuka Nomura 2007-10-09
7268066 Method for semiconductor gate line dimension reduction Douglas J. Bonser, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Philip A. Fisher +1 more 2007-09-11
7235474 System and method for imprint lithography to facilitate dual damascene integration with two imprint acts Bhanwar Singh, Ramkumar Subramanian 2007-06-26
7223698 Method of forming a semiconductor arrangement with reduced field-to active step height Douglas J. Bonser, Mark Kelling, John G. Pellerin, Johannes Groschopf, Edward Asuka Nomura 2007-05-29
7196372 Flash memory device Bin Yu, Ming-Ren Lin, Zoran Krivokapic 2007-03-27
7186650 Control of bottom dimension of tapered contact via variation(s) of etch process 2007-03-06
7183223 Methods for forming small contacts Cyrus E. Tabery, Chih-Yuh Yang, Bin Yu 2007-02-27
7183152 Epitaxially grown fin for FinFET Chih-Yuh Yang, Bin Yu 2007-02-27
7179692 Method of manufacturing a semiconductor device having a fin structure Bin Yu, Shibly S. Ahmed, Judy Xilin An, Zoran Krivokapic, Haihong Wang 2007-02-20