Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8932961 | Critical dimension and pattern recognition structures for devices manufactured using double patterning techniques | Sohan S. Mehta, Tong Qing Chen, Vikrant Chauhan, Ravi Prakash Srivastava, Catherine B. Labelle | 2015-01-13 |
| 7279386 | Method for forming a semiconductor arrangement with gate sidewall spacers of specific dimensions | Douglas J. Bonser, Srikanteswara Dakshina-Murthy, Asuka Nomura | 2007-10-09 |
| 7223698 | Method of forming a semiconductor arrangement with reduced field-to active step height | Douglas J. Bonser, Srikanteswara Dakshina-Murthy, John G. Pellerin, Johannes Groschopf, Edward Asuka Nomura | 2007-05-29 |
| 7144785 | Method of forming isolation trench with spacer formation | Srikanteswara Dakshina-Murthy, Douglas J. Bonser, Asuka Nomura | 2006-12-05 |