| 8525234 |
Formation of FinFET gate spacer |
Catherine B. Labelle |
2013-09-03 |
$2,995,000 |
| 8268727 |
Methods for fabricating FinFET semiconductor devices using planarized spacers |
Frank Scott Johnson |
2012-09-18 |
$4,171,000 |
| 8174055 |
Formation of FinFET gate spacer |
Catherine B. Labelle |
2012-05-08 |
$5,720,000 |
| 7985639 |
Method for fabricating a semiconductor device having a semiconductive resistor structure |
Frank Scott Johnson |
2011-07-26 |
$4,784,000 |
| 7504326 |
Use of scanning theme implanters and annealers for selective implantation and annealing |
George Jonathan Kluth |
2009-03-17 |
$2,427,000 |
| 7279386 |
Method for forming a semiconductor arrangement with gate sidewall spacers of specific dimensions |
Mark Kelling, Srikanteswara Dakshina-Murthy, Asuka Nomura |
2007-10-09 |
$8,436,000 |
| 7268066 |
Method for semiconductor gate line dimension reduction |
Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Srikanteswara Dakshina-Murthy, Philip A. Fisher +1 more |
2007-09-11 |
$10,117,000 |
| 7223698 |
Method of forming a semiconductor arrangement with reduced field-to active step height |
Srikanteswara Dakshina-Murthy, Mark Kelling, John G. Pellerin, Johannes Groschopf, Edward Asuka Nomura |
2007-05-29 |
$8,835,000 |
| 7144785 |
Method of forming isolation trench with spacer formation |
Srikanteswara Dakshina-Murthy, Mark Kelling, Asuka Nomura |
2006-12-05 |
$14,281,000 |
| 7105399 |
Selective epitaxial growth for tunable channel thickness |
Srikanteswara Dakshina-Murthy, Hans Van Meer, David E. Brown |
2006-09-12 |
$23,698,000 |
| 7091106 |
Method of reducing STI divot formation during semiconductor device fabrication |
Johannes Groschopf, Srikanteswara Dakshina-Murthy, John G. Pellerin, Jon D. Cheek |
2006-08-15 |
$18,169,000 |
| 6979651 |
Method for forming alignment features and back-side contacts with fewer lithography and etch steps |
Kay Hellig, Srikanteswara Dakshina-Murthy |
2005-12-27 |
$8,074,000 |
| 6913958 |
Method for patterning a feature using a trimmed hardmask |
Marina V. Plat, Marilyn I. Wright, Chih-Yuh Yang |
2005-07-05 |
$11,775,000 |
| 6900139 |
Method for photoresist trim endpoint detection |
Srikanteswara Dakshina-Murthy, Karen Turnquest |
2005-05-31 |
$6,268,000 |
| 6893967 |
L-shaped spacer incorporating or patterned using amorphous carbon or CVD organic materials |
Marilyn I. Wright, Lu You, Kay Hellig |
2005-05-17 |
$3,810,000 |
| 6881616 |
System for forming a semiconductor device and method thereof including implanting through a L shaped spacer to form source and drain regions |
Kay Hellig, Wen-Jie Qi |
2005-04-19 |
$11,122,000 |
| 6849530 |
Method for semiconductor gate line dimension reduction |
Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Srikanteswara Dakshina-Murthy, Philip A. Fisher +1 more |
2005-02-01 |
$6,992,000 |
| 6812077 |
Method for patterning narrow gate lines |
Darin A. Chan, Mark S. Chang |
2004-11-02 |
$2,431,000 |
| 6797552 |
Method for defect reduction and enhanced control over critical dimensions and profiles in semiconductor devices |
Mark S. Chang, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Srikanteswara Dakshina-Murthy |
2004-09-28 |
$1,915,000 |
| 6773998 |
Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning |
Philip A. Fisher, Marina V. Plat, Chih-Yuh Yang, Christopher F. Lyons, Scott A. Bell +2 more |
2004-08-10 |
$1,968,000 |
| 6764947 |
Method for reducing gate line deformation and reducing gate line widths in semiconductor devices |
Darin A. Chan, Marina V. Plat, Marilyn I. Wright, Chih-Yuh Yang, Lu You +2 more |
2004-07-20 |
$1,607,000 |
| 6764949 |
Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication |
Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Darin A. Chan, Philip A. Fisher +6 more |
2004-07-20 |
$1,607,000 |
| 6750127 |
Method for fabricating a semiconductor device using amorphous carbon having improved etch resistance |
Mark S. Chang, Darin A. Chan, Chih-Yuh Yang, Lu You, Scott A. Bell +1 more |
2004-06-15 |
$4,556,000 |
| 6734088 |
Control of two-step gate etch process |
Matthew A. Purdy, Scott Bushman, James H. Hussey, Jr. |
2004-05-11 |
$5,065,000 |
| 6673635 |
Method for alignment mark formation for a shallow trench isolation process |
Kay Hellig, Srikanteswara Dakshina-Murthy |
2004-01-06 |
$4,179,000 |