Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7279386 | Method for forming a semiconductor arrangement with gate sidewall spacers of specific dimensions | Mark Kelling, Douglas J. Bonser, Srikanteswara Dakshina-Murthy | 2007-10-09 |
| 7144785 | Method of forming isolation trench with spacer formation | Srikanteswara Dakshina-Murthy, Douglas J. Bonser, Mark Kelling | 2006-12-05 |