| 10622370 |
System and method for manufacturing self-aligned STI with single poly |
Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, Youseok Suh, Meng Ding +5 more |
2020-04-14 |
|
| 9276007 |
System and method for manufacturing self-aligned STI with single poly |
Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, Youseok Suh, Meng Ding +5 more |
2016-03-01 |
$10,348,000 |
| 9245895 |
Oro and orpro with bit line trench to suppress transport program disturb |
Ning Cheng, Kuo-Tung Chang, Hiro Kinoshita, Lei Xue, Chungho Lee +3 more |
2016-01-26 |
$4,549,000 |
| 8642441 |
Self-aligned STI with single poly for manufacturing a flash memory device |
Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, Youseok Suh, Meng Ding +5 more |
2014-02-04 |
$2,100,000 |
| 8012830 |
ORO and ORPRO with bit line trench to suppress transport program disturb |
Ning Cheng, Kuo-Tung Chang, Hiro Kinoshita, Lei Xue, Chungho Lee +3 more |
2011-09-06 |
$2,058,000 |
| 7951675 |
SI trench between bitline HDP for BVDSS improvement |
Lei Xue, Aimin Xing, Angela T. Hui, Chungho Lee |
2011-05-31 |
$2,196,000 |
| 7915160 |
Methods for forming small contacts |
Cyrus E. Tabery, Srikanteswara Dakshina-Murthy, Bin Yu |
2011-03-29 |
$9,579,000 |
| 7867848 |
Methods for fabricating dual bit flash memory devices |
Minghao Shen, Fred Cheung, Ning Cheung, Wei Zheng, Hiroyuki Kinoshita |
2011-01-11 |
$3,574,000 |
| 7732281 |
Methods for fabricating dual bit flash memory devices |
Minghao Shen, Fred Cheung, Ning Cheng, Wei Zheng, Hiroyuki Kinoshita |
2010-06-08 |
|
| 7696038 |
Methods for fabricating flash memory devices |
Ning Cheng, Kuo-Tung Chang, Hiroyuki Kinoshita, Timothy Thurgate, Wei Zheng +2 more |
2010-04-13 |
|
| 7675104 |
Integrated circuit memory system employing silicon rich layers |
Amol Joshi, Harpreet Sachar, Youseok Suh, Shenqing Fang, Lovejeet Singh +6 more |
2010-03-09 |
$42,003,000 |
| 7268066 |
Method for semiconductor gate line dimension reduction |
Douglas J. Bonser, Marina V. Plat, Scott A. Bell, Srikanteswara Dakshina-Murthy, Philip A. Fisher +1 more |
2007-09-11 |
$10,117,000 |
| 7183223 |
Methods for forming small contacts |
Cyrus E. Tabery, Srikanteswara Dakshina-Murthy, Bin Yu |
2007-02-27 |
$9,460,000 |
| 7183152 |
Epitaxially grown fin for FinFET |
Srikanteswara Dakshina-Murthy, Bin Yu |
2007-02-27 |
$9,460,000 |
| 7029958 |
Self aligned damascene gate |
Cyrus E. Tabery, Shibly S. Ahmed, Matthew S. Buynoski, Srikanteswara Dakshina-Murthy, Zoran Krivokapic +2 more |
2006-04-18 |
$11,889,000 |
| 7029959 |
Source and drain protection and stringer-free gate formation in semiconductor devices |
Shibly S. Ahmed, Srikanteswara Dakshina-Murhty, Cyrus E. Tabery, Bin Yu |
2006-04-18 |
$11,889,000 |
| 7005386 |
Method for reducing resist height erosion in a gate etch process |
Scott A. Bell, Srikanteswara Dakshina-Murthy, Ashok M. Khathuria |
2006-02-28 |
$11,043,000 |
| 6960804 |
Semiconductor device having a gate structure surrounding a fin |
Shibly S. Ahmed, Judy Xilin An, Srikanteswara Dakshina-Murthy, Bin Yu |
2005-11-01 |
|
| 6913958 |
Method for patterning a feature using a trimmed hardmask |
Marina V. Plat, Marilyn I. Wright, Douglas J. Bonser |
2005-07-05 |
$11,775,000 |
| 6905971 |
Treatment of dielectric material to enhance etch rate |
Cyrus E. Tabery, William G. En, Joong S. Jeon, Minh Van Ngo, Ming-Ren Lin |
2005-06-14 |
$5,811,000 |
| 6864556 |
CVD organic polymer film for advanced gate patterning |
Lu You, Marina V. Plat, Scott A. Bell, Richard J. Huang, Christopher F. Lyons +2 more |
2005-03-08 |
$6,020,000 |
| 6849530 |
Method for semiconductor gate line dimension reduction |
Douglas J. Bonser, Marina V. Plat, Scott A. Bell, Srikanteswara Dakshina-Murthy, Philip A. Fisher +1 more |
2005-02-01 |
$6,992,000 |
| 6835618 |
Epitaxially grown fin for FinFET |
Srikanteswara Dakshina-Murthy, Bin Yu |
2004-12-28 |
$7,308,000 |
| 6828259 |
Enhanced transistor gate using E-beam radiation |
Philip A. Fisher, Marina V. Plat, Russell R.A. Callahan, Ashok M. Khathuria |
2004-12-07 |
$8,137,000 |
| 6797552 |
Method for defect reduction and enhanced control over critical dimensions and profiles in semiconductor devices |
Mark S. Chang, Douglas J. Bonser, Marina V. Plat, Scott A. Bell, Srikanteswara Dakshina-Murthy |
2004-09-28 |
$1,915,000 |
