| 9461151 |
Dual storage node memory |
Hiroyuki Kinoshita, Chungho Lee, Yu Sun, Chi Chang |
2016-10-04 |
| 8748972 |
Flash memory devices and methods for fabricating same |
Ning Cheng, Ashot Melik-Martirosian, Kyunghoon Min, Michael Brennan, Hiroyuki Kinoshita |
2014-06-10 |
| 8564042 |
Dual storage node memory |
Hiroyuki Kinoshita, Chungho Lee, Yu Sun, Chi Chang |
2013-10-22 |
| 8486782 |
Flash memory devices and methods for fabricating the same |
Ning Cheng, Ashot Melik-Martirosian, Kyunghoon Min, Michael Brennan, Hiroyuki Kinoshita |
2013-07-16 |
| 8329598 |
Sacrificial nitride and gate replacement |
Chungho Lee, Kuo-Tung Chang, Hiroyuki Kinoshita, Huaqiang Wu |
2012-12-11 |
| 7981745 |
Sacrificial nitride and gate replacement |
Chungho Lee, Kuo-Tung Chang, Hiroyuki Kinoshita, Huaqiang Wu |
2011-07-19 |
| 7867848 |
Methods for fabricating dual bit flash memory devices |
Minghao Shen, Ning Cheung, Wei Zheng, Hiroyuki Kinoshita, Chih-Yuh Yang |
2011-01-11 |
| 7829936 |
Split charge storage node inner spacer process |
Minghao Shen, Shenqing Fang, Wai Lo, Christie Marrian, Chungho Lee +2 more |
2010-11-09 |
| 7732281 |
Methods for fabricating dual bit flash memory devices |
Minghao Shen, Ning Cheng, Wei Zheng, Hiroyuki Kinoshita, Chih-Yuh Yang |
2010-06-08 |
| 7163860 |
Method of formation of gate stack spacer and charge storage materials having reduced hydrogen content in charge trapping dielectric flash memory device |
Tazrien Kamal, Yun Wu, Mark T. Ramsbey, Jean Y. Yang, Arvind Halliyal +2 more |
2007-01-16 |
| 7033957 |
ONO fabrication process for increasing oxygen content at bottom oxide-substrate interface in flash memory devices |
Hidehiko Shiraiwa, Tazrien Kamal, Mark T. Ramsbey, Inkuk Kang, Jaeyong Park +4 more |
2006-04-25 |
| 6949481 |
Process for fabrication of spacer layer with reduced hydrogen content in semiconductor device |
Arvind Halliyal, Rinji Sugino, Hidehiko Shiraiwa, Tazrien Kamal, Jean Y. Yang |
2005-09-27 |
| 6794764 |
Charge-trapping memory arrays resistant to damage from contact hole information |
Tazrien Kamal, Mark T. Ramsbey, Hidehiko Shiraiwa |
2004-09-21 |
| 6750066 |
Precision high-K intergate dielectric layer |
Arvind Halliyal |
2004-06-15 |
| 6740605 |
Process for reducing hydrogen contamination in dielectric materials in memory devices |
Hidehiko Shiraiwa, Jaeyong Park, Arvind Halliyal |
2004-05-25 |
| 6735123 |
High density dual bit flash memory cell with non planar structure |
Nicholas H. Tripsas, Mark T. Ramsbey, Wei Zheng, Effiong Ibok |
2004-05-11 |
| 6642573 |
Use of high-K dielectric material in modified ONO structure for semiconductor devices |
Arvind Halliyal, Mark T. Ramsbey, Wei Zhang, Mark Randolph |
2003-11-04 |
| 6630383 |
Bi-layer floating gate for improved work function between floating gate and a high-K dielectric layer |
Effiong Ibok, Wei Zheng, Nicholas H. Tripsas, Mark T. Ramsbey |
2003-10-07 |
| 6610594 |
Locally increasing sidewall density by ion implantation |
Eric M. Apelgren, Christian Zistl, Jeremy I. Martin, Paul R. Besser |
2003-08-26 |
| 6514844 |
Sidewall treatment for low dielectric constant (low K) materials by ion implantation |
Jeremy I. Martin, Eric M. Apelgren, Christian Zistl, Paul R. Besser, Srikantewara Dakshina-Murthy +2 more |
2003-02-04 |
| 6451641 |
Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric material |
Arvind Halliyal, Robert B. Ogle, Joong S. Jeon, Effiong Ibok |
2002-09-17 |
