JP

John G. Pellerin

AM AMD: 21 patents #507 of 9,279Top 6%
IBM: 1 patents #44,794 of 70,183Top 65%
Overall (All Time): #210,292 of 4,157,543Top 6%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8753943 Replacement metal gate transistors with reduced gate oxide leakage James Pan 2014-06-17
8445975 Replacement metal gate transistors with reduced gate oxide leakage James Pan 2013-05-21
8053849 Replacement metal gate transistors with reduced gate oxide leakage James Pan 2011-11-08
7902599 Integrated circuit having long and short channel metal gate devices and method of manufacture Richard J. Carter, Michael Hargrove, George J. Kluth 2011-03-08
7723192 Integrated circuit long and short channel metal gate devices and method of manufacture Richard J. Carter, Michael Hargrove, George J. Kluth 2010-05-25
7544572 Multi-operational mode transistor with multiple-channel device structure James Pan 2009-06-09
7253484 Low-power multiple-channel fully depleted quantum well CMOSFETs James Pan, Jon D. Cheek 2007-08-07
7223698 Method of forming a semiconductor arrangement with reduced field-to active step height Douglas J. Bonser, Srikanteswara Dakshina-Murthy, Mark Kelling, Johannes Groschopf, Edward Asuka Nomura 2007-05-29
7091118 Replacement metal gate transistor with metal-rich silicon layer and method for making the same James Pan, Linda Black, Michael P. Chudzik, Rajarao Jammy 2006-08-15
7091106 Method of reducing STI divot formation during semiconductor device fabrication Douglas J. Bonser, Johannes Groschopf, Srikanteswara Dakshina-Murthy, Jon D. Cheek 2006-08-15
7074657 Low-power multiple-channel fully depleted quantum well CMOSFETs James Pan, Jon D. Cheek 2006-07-11
6780776 Nitride offset spacer to minimize silicon recess by using poly reoxidation layer as etch stop layer Wen-Jie Qi, William G. En, Mark W. Michael, Darin A. Chan 2004-08-24
6764917 SOI device with different silicon thicknesses Darin A. Chan, William G. En, Mark W. Michael 2004-07-20
6713357 Method to reduce parasitic capacitance of MOS transistors Hai Hong Wang, Mark W. Michael, Wen-Jie Qi, William G. En 2004-03-30
6580122 Transistor device having an enhanced width dimension and a method of making same Derick J. Wristers, Jon D. Cheek 2003-06-17
6406964 Method of controlling junction recesses in a semiconductor device Derick J. Wristers, Jon D. Cheek 2002-06-18
6399493 Method of silicide formation by silicon pretreatment Robert Dawson, Jon D. Cheek 2002-06-04
6317642 Apparatus and methods for uniform scan dispensing of spin-on materials Lu You, Dawn Hopper, Christof Streck, Richard J. Huang 2001-11-13
6228758 Method of making dual damascene conductive interconnections and integrated circuit device comprising same Thomas Werner 2001-05-08
6191030 Anti-reflective coating layer for semiconductor device Ramkumar Subramanian, Suzette K. Pangrle, Ernesto A. Gallardo 2001-02-20
5986344 Anti-reflective coating layer for semiconductor device Ramkumar Subramanion, Suzette K. Pangrle, Ernesto A. Gallardo 1999-11-16