Issued Patents All Time
Showing 25 most recent of 135 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9447484 | Methods for forming oxide dispersion-strengthened alloys | Harry Lester Kington, Donald G. Godfrey, Mark C. Morris, Michael G. Volas, Brian Hann | 2016-09-20 |
| 7163862 | Semiconductor memory devices and methods for fabricating the same | Joseph William Wiseman, Kelley Kyle Higgins, Sr., Shengnian Song | 2007-01-16 |
| 6677647 | Electromigration characteristics of patterned metal features in semiconductor devices | — | 2004-01-13 |
| 6661057 | Tri-level segmented control transistor and fabrication method | Mark I. Gardner, Frederick N. Hause, H. Jim Fulford, Mark W. Michael, Bradley T. Moore +1 more | 2003-12-09 |
| 6552776 | Photolithographic system including light filter that compensates for lens error | Derick J. Wristers, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Bradley T. Moore +1 more | 2003-04-22 |
| 6522013 | Punch-through via with conformal barrier liner | Robert Chen, Jeffrey A. Shields, Khanh Tran | 2003-02-18 |
| 6472751 | H2 diffusion barrier formation by nitrogen incorporation in oxide layer | Robert Chen, Jeffrey A. Shields, Khanh Tran | 2002-10-29 |
| 6410409 | Implanted barrier layer for retarding upward diffusion of substrate dopant | Mark I. Gardner, H. Jim Fulford, Frederick N. Hause, Mark W. Michael, Bradley T. Moore +1 more | 2002-06-25 |
| 6399493 | Method of silicide formation by silicon pretreatment | Jon D. Cheek, John G. Pellerin | 2002-06-04 |
| 6380055 | Dopant diffusion-retarding barrier region formed within polysilicon gate layer | Mark I. Gardner, H. Jim Fulford, Frederick N. Hause, Mark W. Michael, Bradley T. Moore +1 more | 2002-04-30 |
| 6376330 | Dielectric having an air gap formed between closely spaced interconnect lines | H. Jim Fulford, Fred N. Hause, Basab Bandyopadhyay, Mark W. Michael, William S. Brennan | 2002-04-23 |
| 6372588 | Method of making an IGFET using solid phase diffusion to dope the gate, source and drain | Derick J. Wristers, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 2002-04-16 |
| 6353253 | Semiconductor isolation region bounded by a trench and covered with an oxide to improve planarization | Fred N. Hause, Basab Bandyopadhyay, H. Jim Fulford, Mark W. Michael, William S. Brennan | 2002-03-05 |
| 6326298 | Substantially planar semiconductor topography using dielectrics and chemical mechanical polish | Mark W. Michael, Basab Bandyopadhyay, H. Jim Fulford, Fred N. Hause, William S. Brennan | 2001-12-04 |
| 6323524 | Semiconductor device having a vertical active region and method of manufacture thereof | Charles E. May | 2001-11-27 |
| 6323095 | Method for reducing junction capacitance using a halo implant photomask | Mark W. Michael, Jon D. Cheek | 2001-11-27 |
| 6259142 | Multiple split gate semiconductor device and fabrication method | Mark I. Gardner, Frederick N. Hause, H. Jim Fulford, Mark W. Michael, Bradley T. Moore +1 more | 2001-07-10 |
| 6225151 | Nitrogen liner beneath transistor source/drain regions to retard dopant diffusion | Mark I. Gardner, H. Jim Fulford, Frederick N. Hause, Daniel Kadosh, Mark W. Michael +2 more | 2001-05-01 |
| 6208015 | Interlevel dielectric with air gaps to lessen capacitive coupling | Basab Bandyopadhyay, H. Jim Fulford, Fred N. Hause, Mark W. Michael, William S. Brennan | 2001-03-27 |
| 6201278 | Trench transistor with insulative spacers | Mark I. Gardner, H. Jim Fulford, Frederick N. Hause, Mark W. Michael, Bradley T. Moore +1 more | 2001-03-13 |
| 6197645 | Method of making an IGFET with elevated source/drain regions in close proximity to gate with sloped sidewalls | Mark W. Michael, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Bradley T. Moore +1 more | 2001-03-06 |
| 6194328 | H2 diffusion barrier formation by nitrogen incorporation in oxide layer | Robert Chen, Jeffrey A. Shields, Khanh Tran | 2001-02-27 |
| 6188114 | Method of forming an insulated-gate field-effect transistor with metal spacers | Mark I. Gardner, H. Jim Fulford, Frederick N. Hause, Mark W. Michael, Bradley T. Moore +1 more | 2001-02-13 |
| 6184986 | Depositing a material of controlled, variable thickness across a surface for planarization of that surface | Charles E. May | 2001-02-06 |
| 6166354 | System and apparatus for in situ monitoring and control of annealing in semiconductor fabrication | Frederick N. Hause, H. Jim Fulford, Mark I. Gardner, Mark W. Michael, Bradley T. Moore +1 more | 2000-12-26 |