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USPTO Patent Rankings Data through Dec 31, 2025
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Mark I. Gardner — 608 Patents

AMD: 507 patents #1 of 9,280Top 1%
TLTokyo Electron Limited: 92 patents #12 of 5,567Top 1%
APAdvanced Microdevices Pvt: 2 patents #1 of 26Top 4%
Infineon Technologies Ag: 2 patents #3,286 of 7,486Top 45%
Prairieville, TX: #1 of 6 inventorsTop 20%
Texas: #2 of 125,132 inventorsTop 1%
Overall (All Time): #246 of 4,157,543Top 1%
608 Patents All Time
Mark I. Gardner has been granted 608 US patents while listed as an inventor at AMD. The first was granted in 1994 and the most recent in September 2025. Mark I. Gardner ranks #246 of 4,157,543 US inventors in our database (top 0.01%). Patent records list Mark I. Gardner in Prairieville, TX, US.

Issued Patents All Time

Showing 1–25 of 608 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12408321 3D horizontal memory cell with sequential 3D vertical stacking H. Jim Fulford, Partha Mukhopadhyay 2025-09-02
12381118 3D multiple location compressing bonded arm for advanced integration Andrew WELOTH, Daniel Fulford, Anthony R. Schepis, H. Jim Fulford, Anton J. deVilliers +1 more 2025-08-05
12363956 2D material to integrate 3D horizontal nanosheets using a carrier nanosheet H. Jim Fulford 2025-07-15
12356706 Methods for forming high performance three dimensionally stacked transistors based on dielectric nano sheets H. Jim Fulford 2025-07-08
12349424 Epitaxial semiconductor 3D horizontal nano sheet with high mobility 2D material channel H. Jim Fulford, Partha Mukhopadhyay 2025-07-01
12342568 3D device with a plurality of core wiring layout architecture H. Jim Fulford 2025-06-24
12342603 Plurality of devices in adjacent 3D stacks in different circuit locations H. Jim Fulford 2025-06-24
12336270 High performance new channel materials precision aligned 3D CFET device architecture H. Jim Fulford 2025-06-17
12328919 3D isolation of a segmentated 3D nanosheet channel region H. Jim Fulford 2025-06-10
12324206 Semiconductor devices and methods of manufacturing thereof H. Jim Fulford, Partha Mukhopadhyay 2025-06-03
12317577 3D semiconductor device with 2D semiconductor material and method of forming the same H. Jim Fulford 2025-05-27
12317481 3D memory with cell stacking using an in-situ capacitor stack H. Jim Fulford 2025-05-27
12302606 Semiconductor devices with crystallized channel regions and methods of manufacturing thereof H. Jim Fulford 2025-05-13
12289885 3D integration of 3D NAND and vertical logic beneath memory H. Jim Fulford 2025-04-29
12288747 Multi-dimensional metal first device layout and circuit design H. Jim Fulford, Partha Mukhopadhyay 2025-04-29
12272692 3D selective material transformation to integrate 2D material elements H. Jim Fulford 2025-04-08
12261209 Replacement channel 2D material integration Robert D. Clark, H. Jim Fulford 2025-03-25
12249659 2D materials with inverted gate electrode for high density 3D stacking H. Jim Fulford 2025-03-11
12243920 Method to form selective high-k deposition on 2D materials H. Jim Fulford 2025-03-04
12218195 Vertical semiconductor device in narrow slots within trench H. Jim Fulford 2025-02-04
12218244 Vertical transistor structures and methods utilizing selective formation H. Jim Fulford, Partha Mukhopadhyay 2025-02-04
12218011 Method of making 3D segmented devices for enhanced 3D circuit density H. Jim Fulford 2025-02-04
12191210 Formation of high density 3D circuits with enhanced 3D conductivity H. Jim Fulford, Partha Mukhopadhyay 2025-01-07
12176249 3D nano sheet method using 2D material integrated with conductive oxide for high performance devices H. Jim Fulford, Partha Mukhopadhyay 2024-12-24
12170326 Three-dimensional device with vertical core and bundled wiring H. Jim Fulford 2024-12-17

Nearby-Ranked Inventors

Yang Zhang616
Hans-Joachim Schulze616
Takashi Ando611
Kie Y. Ahn610
Toni Weinschenk608
Geoffrey B. Rhoads608
Lokesh M. Gupta607
Joseph Binamira Soriaga607
Hiroyuki Kobayashi607