Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12408321 | 3D horizontal memory cell with sequential 3D vertical stacking | Mark I. Gardner, H. Jim Fulford | 2025-09-02 |
| 12349424 | Epitaxial semiconductor 3D horizontal nano sheet with high mobility 2D material channel | Mark I. Gardner, H. Jim Fulford | 2025-07-01 |
| 12324206 | Semiconductor devices and methods of manufacturing thereof | Mark I. Gardner, H. Jim Fulford | 2025-06-03 |
| 12288747 | Multi-dimensional metal first device layout and circuit design | H. Jim Fulford, Mark I. Gardner | 2025-04-29 |
| 12218244 | Vertical transistor structures and methods utilizing selective formation | Mark I. Gardner, H. Jim Fulford | 2025-02-04 |
| 12191210 | Formation of high density 3D circuits with enhanced 3D conductivity | H. Jim Fulford, Mark I. Gardner | 2025-01-07 |
| 12176249 | 3D nano sheet method using 2D material integrated with conductive oxide for high performance devices | H. Jim Fulford, Mark I. Gardner | 2024-12-24 |
| 12133387 | 3D memory with conductive dielectric channel integrated with logic access transistors | Mark I. Gardner, H. Jim Fulford | 2024-10-29 |
| 12131956 | Ultra dense 3D routing for compact 3D designs | H. Jim Fulford, Mark I. Gardner | 2024-10-29 |
| 12114480 | Method of making of plurality of 3D vertical logic elements integrated with 3D memory | H. Jim Fulford, Mark I. Gardner | 2024-10-08 |
| 12068205 | 3D high density compact metal first approach for hybrid transistor designs without using epitaxial growth | Mark I. Gardner, H. Jim Fulford | 2024-08-20 |
| 12009355 | 3D stacked DRAM with 3D vertical circuit design | H. Jim Fulford, Mark I. Gardner | 2024-06-11 |
| 11830876 | Three-dimensional device with self-aligned vertical interconnection | H. Jim Fulford, Mark I. Gardner | 2023-11-28 |
| 11756836 | 3D device layout and method using advanced 3D isolation | H. Jim Fulford, Mark I. Gardner | 2023-09-12 |