Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7645632 | Self aligned memory element and wordline | Ashok M. Khathuria | 2010-01-12 |
| 7220985 | Self aligned memory element and wordline | Ashok M. Khathuria | 2007-05-22 |
| 7015504 | Sidewall formation for high density polymer memory element array | Christopher F. Lyons, Mark S. Chang, Sergey Lopatin, Ramkumar Subramanian, Minh Van Ngo +1 more | 2006-03-21 |
| 6989563 | Flash memory cell with UV protective layer | Krishnashree Achuthan, Cyrus E. Tabery, Jean Y. Yang, Ning Cheng, Minh Van Ngo | 2006-01-24 |
| 6955939 | Memory element formation with photosensitive polymer dielectric | Christopher F. Lyons, Terence Tong | 2005-10-18 |
| 6900488 | Multi-cell organic memory element and methods of operating and fabricating | Sergey Lopatin, Mark S. Chang, Minh Van Ngo | 2005-05-31 |
| 6836398 | System and method of forming a passive layer by a CMP process | Ramkumar Subramanian, Jane V. Oglesby, Minh Van Ngo, Mark S. Chang, Sergey Lopatin +3 more | 2004-12-28 |
| 6803267 | Silicon containing material for patterning polymeric memory element | Ramkumar Subramanian, Christopher F. Lyons, Matthew S. Buynoski, Angela T. Hui, Ashok M. Khathuria +5 more | 2004-10-12 |
| 6787458 | Polymer memory device formed in via opening | Nicholas H. Tripsas, Matthew S. Buynoski, Suzette K. Pangrle, Uzodinma Okoroanyanwu, Angela T. Hui +7 more | 2004-09-07 |
| 6350639 | Simplified graded LDD transistor using controlled polysilicon gate profile | Allen S. Yu, Paul J. Steffan | 2002-02-26 |
| 6287922 | Method for fabricating graded LDD transistor using controlled polysilicon gate profile | Allen S. Yu, Paul J. Steffan | 2001-09-11 |
| 6274443 | Simplified graded LDD transistor using controlled polysilicon gate profile | Allen S. Yu, Paul J. Steffan | 2001-08-14 |
| 6191044 | Method for forming graded LDD transistor using controlled polysilicon gate profile | Allen S. Yu, Paul J. Steffan | 2001-02-20 |
| 6013570 | LDD transistor using novel gate trim technique | Allen S. Yu, Paul J. Steffan | 2000-01-11 |