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Allen S. Yu — 55 Patents

AMD: 54 patents #122 of 9,280Top 2%

Fremont, CA: #203 of 9,298 inventorsTop 3%

California: #6,830 of 386,348 inventorsTop 2%

Overall (All Time): #45,454 of 4,157,543Top 2%

55 Patents All Time

Allen S. Yu has been granted 55 US patents while listed as an inventor at AMD. The first was granted in 1999 and the most recent in April 2006. Allen S. Yu ranks #45,454 of 4,157,543 US inventors in our database (top 1.1%). Patent records list Allen S. Yu in Fremont, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 55 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7033919	Fabrication of dual work-function metal gate structure for complementary field effect transistors	James Pan	2006-04-25
6864163	Fabrication of dual work-function metal gate structure for complementary field effect transistors	James Pan	2005-03-08	$6,020,000
6709924	Fabrication of shallow trench isolation structures with rounded corner and self-aligned gate	Jeffrey A. Shields, Allison Holbrook	2004-03-23	$3,151,000
6605541	Pitch reduction using a set of offset masks	—	2003-08-12	$3,677,000
6596591	Methods to form reduced dimension bit-line isolation in the manufacture of non-volatile memory devices	Chau M. Ho, Paul J. Steffan	2003-07-22	$3,195,000
6524916	Controlled gate length and gate profile semiconductor device and manufacturing method therefor	Thomas C. Scholer, Paul J. Steffan	2003-02-25	$1,843,000
6512842	Composition based association engine for image archival systems	Paul J. Steffan	2003-01-28	$2,528,000
6506639	Method of forming low resistance reduced channel length transistors	Paul J. Steffan	2003-01-14	$2,234,000
6468815	Overlay radius offset shift engine	Paul J. Steffan	2002-10-22	$2,399,000
6463171	Automatic defect resizing tool	Paul J. Steffan	2002-10-08	$890,000
6448606	Semiconductor with increased gate coupling coefficient	Thomas C. Scholer, Paul J. Steffan	2002-09-10	$1,244,000
6433371	Controlled gate length and gate profile semiconductor device	Thomas C. Scholer, Paul J. Steffan	2002-08-13	$2,174,000
6430572	Recipe management database system	Paul J. Steffan	2002-08-06	$1,934,000
6426301	Reduction of via etch charging damage through the use of a conducting hard mask	Jeffrey A. Shields, Ramkumar Subramanian, Bharath Rangarajan	2002-07-30	$3,277,000
6423557	ADC based in-situ destructive analysis selection and methodology therefor	Paul J. Steffan	2002-07-23	$1,368,000
6424881	Computer generated recipe selector utilizing defect file information	Paul J. Steffan	2002-07-23	$1,368,000
6421574	Automatic defect classification system based variable sampling plan	Paul J. Steffan	2002-07-16	$1,835,000
6395567	Process control using ideal die data in an optical comparator scanning system	Paul J. Steffan	2002-05-28	$2,985,000
6387758	Method of making vertical field effect transistor having channel length determined by the thickness of a layer of dummy material	Chau M. Ho	2002-05-14	$2,737,000
6377898	Automatic defect classification comparator die selection system	Paul J. Steffan	2002-04-23	$2,653,000
6376877	Double self-aligning shallow trench isolation semiconductor and manufacturing method therefor	Jeffrey A. Shields	2002-04-23	$2,653,000
6376312	Formation of non-volatile memory device comprised of an array of vertical field effect transistor structures	—	2002-04-23	$2,653,000
6369453	Semiconductor wafer for measurement and recordation of impurities in semiconductor insulators	Pei-Yuan Gao, Narendra Patel	2002-04-09	$2,418,000
6350639	Simplified graded LDD transistor using controlled polysilicon gate profile	Patrick K. Cheung, Paul J. Steffan	2002-02-26	$4,948,000
6338001	In line yield prediction using ADC determined kill ratios die health statistics and die stacking	Paul J. Steffan	2002-01-08	$11,293,000