Issued Patents All Time
Showing 26–50 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6303394 | Global cluster pre-classification methodology | Paul J. Steffan | 2001-10-16 |
| 6291252 | Automatic method to eliminate first-wafer effect | Paul J. Steffan | 2001-09-18 |
| 6291332 | Electroless plated semiconductor vias and channels | Paul J. Steffan | 2001-09-18 |
| 6287922 | Method for fabricating graded LDD transistor using controlled polysilicon gate profile | Patrick K. Cheung, Paul J. Steffan | 2001-09-11 |
| 6287968 | Method of defining copper seed layer for selective electroless plating processing | Paul J. Steffan, Thomas C. Scholer | 2001-09-11 |
| 6284553 | Location dependent automatic defect classification | Paul J. Steffan | 2001-09-04 |
| 6274443 | Simplified graded LDD transistor using controlled polysilicon gate profile | Patrick K. Cheung, Paul J. Steffan | 2001-08-14 |
| 6272393 | Efficient tool utilization using previous scan data | Paul J. Steffan | 2001-08-07 |
| 6261960 | High density contacts having rectangular cross-section for dual damascene applications | Bharath Rangarajan, Paul J. Steffan | 2001-07-17 |
| 6239008 | Method of making a density multiplier for semiconductor device manufacturing | Paul J. Steffan, Thomas C. Scholer | 2001-05-29 |
| 6238940 | Intra-tool defect offset system | Paul J. Steffan | 2001-05-29 |
| 6214742 | Post-via tin removal for via resistance improvement | Jeffrey A. Shields | 2001-04-10 |
| 6204133 | Self-aligned extension junction for reduced gate channel | Paul J. Steffan | 2001-03-20 |
| 6200823 | Method for isolation of optical defect images | Paul J. Steffan | 2001-03-13 |
| 6191036 | Use of photoresist focus exposure matrix array as via etch monitor | Paul J. Steffan, Bharath Rangarajan | 2001-02-20 |
| 6191044 | Method for forming graded LDD transistor using controlled polysilicon gate profile | Patrick K. Cheung, Paul J. Steffan | 2001-02-20 |
| 6177287 | Simplified inter database communication system | Paul J. Steffan | 2001-01-23 |
| 6171874 | Non-defect image and data transfer and storage methodology | Paul J. Steffan | 2001-01-09 |
| 6165805 | Scan tool recipe server | Paul J. Steffan | 2000-12-26 |
| 6133140 | Method of manufacturing dual damascene utilizing anisotropic and isotropic properties | Paul J. Steffan, Thomas C. Scholer | 2000-10-17 |
| 6107204 | Method to manufacture multiple damascene by utilizing etch selectivity | Paul J. Steffan, Thomas C. Scholer | 2000-08-22 |
| 6103616 | Method to manufacture dual damascene structures by utilizing short resist spacers | Thomas C. Scholer, Paul J. Steffan | 2000-08-15 |
| 6100593 | Multiple chip hybrid package using bump technology | Paul J. Steffan, Thomas C. Scholer | 2000-08-08 |
| 6093647 | Method to selectively electroplate conductive material into trenches | Paul J. Steffan | 2000-07-25 |
| 6091138 | Multi-chip packaging using bump technology | Paul J. Steffan, Thomas C. Scholer | 2000-07-18 |