Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8202810 | Low-H plasma treatment with N2 anneal for electronic memory devices | Alexander H. Nickel, Allen L. Evans, Minh Quoc Tran, Lu You, Minh Van Ngo +4 more | 2012-06-19 |
| 7300886 | Interlayer dielectric for charge loss improvement | Minh Van Ngo, Ning Cheng, Wenmei Li, Angela T. Hui, Robert A. Huertas | 2007-11-27 |
| 7297592 | Semiconductor memory with data retention liner | Minh Van Ngo, Arvind Halliyal, Tazrien Kamal, Hidehiko Shiraiwa, Rinji Sugino +1 more | 2007-11-20 |
| 7183198 | Method for forming a hardmask employing multiple independently formed layers of a capping material to reduce pinholes | Lu You, Richard J. Huang | 2007-02-27 |
| 7060554 | PECVD silicon-rich oxide layer for reduced UV charging | Minh Van Ngo, Mark T. Ramsbey, Tazrien Kamal | 2006-06-13 |
| 7033960 | Multi-chamber deposition of silicon oxynitride film for patterning | Lu You, Richard J. Huang | 2006-04-25 |
| 7023046 | Undoped oxide liner/BPSG for improved data retention | Minh Van Ngo, Angela T. Hui, Ning Cheng, Jeyong Park, Jean Y. Yang +3 more | 2006-04-04 |
| 6803265 | Liner for semiconductor memories and manufacturing method therefor | Minh Van Ngo, Arvind Halliyal, Tazrien Kamal, Hidehiko Shiraiwa, Rinji Sugino +1 more | 2004-10-12 |
| 6803313 | Method for forming a hardmask employing multiple independently formed layers of a pecvd material to reduce pinholes | Lu You, Richard J. Huang | 2004-10-12 |
| 6764949 | Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication | Douglas J. Bonser, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Darin A. Chan +6 more | 2004-07-20 |
| 6653735 | CVD silicon carbide layer as a BARC and hard mask for gate patterning | Chih-Yuh Yang, Douglas J. Bonser, Lu You | 2003-11-25 |
| 6627973 | Void-free interlayer dielectric (ILD0) for 0.18-micron flash memory semiconductor device | Minh Van Ngo, Robert A. Huertas, Lu You, King Wai Kelwin Ko | 2003-09-30 |
| 6489253 | Method of forming a void-free interlayer dielectric (ILD0) for 0.18-&mgr;m flash memory technology and semiconductor device thereby formed | Minh Van Ngo, Robert A. Huertas, Lu You, King Wai Kelwin Ko | 2002-12-03 |
| 6410461 | Method of depositing sion with reduced defects | Minh Van Ngo | 2002-06-25 |
| 6403385 | Method of inspecting a semiconductor wafer for defects | Subramanian Venkatkrishnan, Tho Le La, Richard Lamm | 2002-06-11 |
| 6369453 | Semiconductor wafer for measurement and recordation of impurities in semiconductor insulators | Narendra Patel, Allen S. Yu | 2002-04-09 |
| 6297065 | Method to rework device with faulty metal stack layer | Jiahua Huang, Anne E. Sanderfer | 2001-10-02 |