Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8507969 | Method and system for providing contact to a first polysilicon layer in a flash memory device | Mark S. Chang, Hao Fang | 2013-08-13 |
| 8329530 | Method and system for providing contact to a first polysilicon layer in a flash memory device | Mark S. Chang, Hao Fang | 2012-12-11 |
| 8183619 | Method and system for providing contact to a first polysilicon layer in a flash memory device | Mark S. Chang, Hao Fang | 2012-05-22 |
| 7226839 | Method and system for improving the topography of a memory array | Hiroyuki Kinoshita, Hiroyuki Ogawa, Yu Sun | 2007-06-05 |
| 6627973 | Void-free interlayer dielectric (ILD0) for 0.18-micron flash memory semiconductor device | Minh Van Ngo, Robert A. Huertas, Lu You, Pei-Yuan Gao | 2003-09-30 |
| 6603211 | Method and system for providing a robust alignment mark at thin oxide layers | Michael K. Templeton, Hao Fang, Maria C. Chan | 2003-08-05 |
| 6489253 | Method of forming a void-free interlayer dielectric (ILD0) for 0.18-&mgr;m flash memory technology and semiconductor device thereby formed | Minh Van Ngo, Robert A. Huertas, Lu You, Pei-Yuan Gao | 2002-12-03 |
| 6472327 | Method and system for etching tunnel oxide to reduce undercutting during memory array fabrication | Mark S. Chang, Hao Fang | 2002-10-29 |
| 6448594 | Method and system for processing a semiconductor device | Maria C. Chan, Hao Fang, Lu You, Mark S. Chang | 2002-09-10 |
| 6445051 | Method and system for providing contacts with greater tolerance for misalignment in a flash memory | Mark S. Chang, Hao Fang, John Jianshi Wang, Michael K. Templeton, Lu You +1 more | 2002-09-03 |
| 6333263 | Method of reducing stress corrosion induced voiding of patterned metal layers | Minh Van Ngo, Simon S. Chan, Anne E. Sanderfer | 2001-12-25 |
| 6251776 | Plasma treatment to reduce stress corrosion induced voiding of patterned metal layers | Minh Van Ngo, Simon S. Chan, Anne E. Sanderfer | 2001-06-26 |
| 6130169 | Efficient in-situ resist strip process for heavy polymer metal etch | Jeffrey A. Shields, Leobardo Mercado | 2000-10-10 |