Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Tho Le La — 8 Patents

AMD: 8 patents #1,582 of 9,280Top 20%
San Jose, CA: #7,707 of 32,062 inventorsTop 25%
California: #74,834 of 386,348 inventorsTop 20%
Overall (All Time): #600,572 of 4,157,543Top 15%
8 Patents All Time
Tho Le La has been granted 8 US patents while listed as an inventor at AMD. The first was granted in 1998 and the most recent in July 2022. Tho Le La ranks #600,572 of 4,157,543 US inventors in our database (top 14.4%). Patent records list Tho Le La in San Jose, CA, US.

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11385287 Method for adaptively utilizing programmable logic devices Andreas L. Astuti, Jian Shi 2022-07-12
6507942 Methods and circuits for testing a circuit fabrication process for device uniformity Anthony P. Calderone, Feng Wang 2003-01-14 $17,679,000
6403385 Method of inspecting a semiconductor wafer for defects Subramanian Venkatkrishnan, Pei-Yuan Gao, Richard Lamm 2002-06-11 $2,353,000
6350627 Interlevel dielectric thickness monitor for complex semiconductor chips John Jianshi Wang, Hao Fang 2002-02-26 $4,948,000
6136510 Doubled-sided wafer scrubbing for improved photolithography Subramanian Venkatkrishnan, Mark T. Ramsbey, Jack F. Thomas, Kathleen R. Early 2000-10-24 $7,838,000
6072191 Interlevel dielectric thickness monitor for complex semiconductor chips John Jianshi Wang, Hao Fang 2000-06-06 $15,623,000
5780204 Backside wafer polishing for improved photolithography Subramanian Venkatkrishnan, Mark T. Ramsbey, Jack F. Thomas, Kathleen R. Early 1998-07-14 $3,424,000
5761064 Defect management system for productivity and yield improvement Ying Shiau 1998-06-02 $1,907,000