Jack F. Thomas — 12 Patents at AMD

Jack F. Thomas has been granted 12 US patents while listed as an inventor at AMD. The first was granted in 1998 and the most recent in April 2014. Jack F. Thomas ranks #396,045 of 4,157,543 US inventors in our database (top 9.5%). Patent records list Jack F. Thomas in Palo Alto, CA, US.

Issued Patents All Time

Showing 1–12 of 12 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
8691647	Memory devices containing a high-K dielectric layer	Wei Zheng, Arvind Halliyal, Mark T. Ramsbey	2014-04-08	$1,440,000
7001807	Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same	Wei Zheng, Mark Randolph, Nicholas H. Tripsas, Zoran Krivokapic, Mark T. Ramsbey	2006-02-21	$12,668,000
6861307	Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same	Wei Zheng, Mark Randolph, Nicholas H. Tripsas, Zoran Krivokapic, Mark T. Ramsbey	2005-03-01	$6,648,000
6670691	Shallow trench isolation fill process	Harpreet Sachar, Unsoon Kim	2003-12-30	$4,545,000
6639271	Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same	Wei Zheng, Mark Randolph, Nicholas H. Tripsas, Zoran Krivokapic, Mark T. Ramsbey	2003-10-28	$6,461,000
6610577	Self-aligned polysilicon polish	Unsoon Kim, Krishnashree Achuthan	2003-08-26	$4,773,000
6486029	Integration of an ion implant hard mask structure into a process for fabricating high density memory cells	David K. Foote, Bharath Rangarajan, Stephan K. Park, Fei Wang, Dawn Hopper +2 more	2002-11-26	$2,975,000
6436766	Process for fabricating high density memory cells using a polysilicon hard mask	Bharath Rangarajan, David K. Foote, Fei Wang, Dawn Hopper, Stephen Keetai Park +2 more	2002-08-20	$3,107,000
6399446	Process for fabricating high density memory cells using a metallic hard mask	Bharath Rangarajan, David K. Foote, Fei Wang, Dawn Hopper, Stephen Keetai Park +2 more	2002-06-04	$2,015,000
6242773	Self-aligning poly 1 ono dielectric for non-volatile memory	—	2001-06-05	$7,807,000
6136510	Doubled-sided wafer scrubbing for improved photolithography	Tho Le La, Subramanian Venkatkrishnan, Mark T. Ramsbey, Kathleen R. Early	2000-10-24	$7,838,000
5780204	Backside wafer polishing for improved photolithography	Tho Le La, Subramanian Venkatkrishnan, Mark T. Ramsbey, Kathleen R. Early	1998-07-14	$3,424,000

Jack F. Thomas — 12 Patents

Issued Patents All Time

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