Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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David K. Foote — 42 Patents

AMD: 35 patents #263 of 9,280Top 3%
NONordson: 7 patents #133 of 1,063Top 15%
Fujitsu Limited: 1 patents #14,843 of 24,456Top 65%
San Jose, CA: #1,306 of 32,062 inventorsTop 5%
California: #10,667 of 386,348 inventorsTop 3%
Overall (All Time): #72,062 of 4,157,543Top 2%
42 Patents All Time
David K. Foote has been granted 42 US patents while listed as an inventor at AMD. The first was granted in 1998 and the most recent in July 2018. David K. Foote ranks #72,062 of 4,157,543 US inventors in our database (top 1.7%). Patent records list David K. Foote in San Jose, CA, US.

Patents per Year

Patents granted per year, 1998 to 2018Bar chart with a peak of 11 patents in 2002.peak 111998: 1 patents19981999: 4 patents2000: 7 patents20002001: 8 patents2002: 11 patents20022003: 3 patents2005: 1 patents20052012: 3 patents2013: 1 patents20132016: 2 patents2018: 1 patents2018

Issued Patents All Time

Showing 1–25 of 42 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10026436 Apparatus and methods for supporting workpieces during plasma processing James D. Getty 2018-07-17 $22,397,000
9385017 Apparatus and methods for handling workpieces of different sizes James P. Fazio, James D. Getty 2016-07-05 $13,905,000
9382623 Apparatus and method for intraluminal polymer deposition 2016-07-05 $13,905,000
8597982 Methods of fabricating electronics assemblies James D. Getty, Jiangang Zhao 2013-12-03 $10,093,000
8313455 Syringes with a reduced susceptibility to freeze-thaw void formation and methods of manufacturing such syringes Henry DiGregorio, James D. Getty 2012-11-20 $7,773,000
8268675 Passivation layer for semiconductor device packaging James D. Getty 2012-09-18 $25,199,000
8231568 Syringes with a reduced susceptibility to freeze-thaw void formation and methods of manufacturing such syringes Henry DiGregorio, James D. Getty 2012-07-31 $20,810,000
6903007 Process for forming bottom anti-reflection coating for semiconductor fabrication photolithography which inhibits photoresist footing Minh Van Ngo 2005-06-07 $8,078,000
6562683 Bit-line oxidation by removing ONO oxide prior to bit-line implant Fei Wang, Stephen Keetai Park 2003-05-13 $1,759,000
6537881 Process for fabricating a non-volatile memory device Bharath Rangarajan, Fei Wang, Steven K. Park 2003-03-25 $2,887,000
6528390 Process for fabricating a non-volatile memory device Hideki Komori, Fei Wang, Bharath Rangarajan 2003-03-04 $1,276,000
6486029 Integration of an ion implant hard mask structure into a process for fabricating high density memory cells Bharath Rangarajan, Stephan K. Park, Fei Wang, Dawn Hopper, Jack F. Thomas +2 more 2002-11-26 $2,975,000
6458677 Process for fabricating an ONO structure Dawn Hopper, Bharath Rangarajan 2002-10-01 $734,000
6436766 Process for fabricating high density memory cells using a polysilicon hard mask Bharath Rangarajan, Fei Wang, Dawn Hopper, Stephen Keetai Park, Jack F. Thomas +2 more 2002-08-20 $3,107,000
6410388 Process for optimizing pocket implant profile by RTA implant annealing for a non-volatile semiconductor device George Jonathan Kluth, Stephen Keetai Park, Arvind Halliyal 2002-06-25 $2,000,000
6406960 Process for fabricating an ONO structure having a silicon-rich silicon nitride layer Dawn Hopper, Bharath Rangarajan, Arvind Halliyal 2002-06-18 $3,499,000
6399480 Methods and arrangements for insulating local interconnects for improved alignment tolerance and size reduction William G. En, Darin A. Chan, Fei Wang, Minh Van Ngo 2002-06-04 $2,015,000
6399446 Process for fabricating high density memory cells using a metallic hard mask Bharath Rangarajan, Fei Wang, Dawn Hopper, Stephen Keetai Park, Jack F. Thomas +2 more 2002-06-04 $2,015,000
6395644 Process for fabricating a semiconductor device using a silicon-rich silicon nitride ARC Dawn Hopper, Minh Van Ngo 2002-05-28 $2,985,000
6380588 Semiconductor device having uniform spacers William G. En, Minh Van Ngo, Chih-Yuk Yang, Scott A. Bell, Olov Karlsson +1 more 2002-04-30 $1,930,000
6376308 Process for fabricating an EEPROM device having a pocket substrate region Fei Wang, Bharath Rangarajan, George J. Kluth 2002-04-23 $2,653,000
6365320 Process for forming anti-reflective film for semiconductor fabrication using extremely short wavelength deep ultraviolet photolithography Subhash Gupta 2002-04-02 $3,760,000
6313018 Process for fabricating semiconductor device including antireflective etch stop layer Fei Wang, Myron R. Cagan, Subhash Gupta 2001-11-06 $9,019,000
6297143 Process for forming a bit-line in a MONOS device Bharath Rangarajan, Fei Wang, Steven K. Park 2001-10-02 $2,425,000
6248628 Method of fabricating an ONO dielectric by nitridation for MNOS memory cells Arvind Halliyal, Hideki Komori, Kenneth Wo-Wai Au 2001-06-19 $7,293,000