Issued Patents All Time
Showing 25 most recent of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10026436 | Apparatus and methods for supporting workpieces during plasma processing | James D. Getty | 2018-07-17 |
| 9382623 | Apparatus and method for intraluminal polymer deposition | — | 2016-07-05 |
| 9385017 | Apparatus and methods for handling workpieces of different sizes | James P. Fazio, James D. Getty | 2016-07-05 |
| 8597982 | Methods of fabricating electronics assemblies | James D. Getty, Jiangang Zhao | 2013-12-03 |
| 8313455 | Syringes with a reduced susceptibility to freeze-thaw void formation and methods of manufacturing such syringes | Henry DiGregorio, James D. Getty | 2012-11-20 |
| 8268675 | Passivation layer for semiconductor device packaging | James D. Getty | 2012-09-18 |
| 8231568 | Syringes with a reduced susceptibility to freeze-thaw void formation and methods of manufacturing such syringes | Henry DiGregorio, James D. Getty | 2012-07-31 |
| 6903007 | Process for forming bottom anti-reflection coating for semiconductor fabrication photolithography which inhibits photoresist footing | Minh Van Ngo | 2005-06-07 |
| 6562683 | Bit-line oxidation by removing ONO oxide prior to bit-line implant | Fei Wang, Stephen Keetai Park | 2003-05-13 |
| 6537881 | Process for fabricating a non-volatile memory device | Bharath Rangarajan, Fei Wang, Steven K. Park | 2003-03-25 |
| 6528390 | Process for fabricating a non-volatile memory device | Hideki Komori, Fei Wang, Bharath Rangarajan | 2003-03-04 |
| 6486029 | Integration of an ion implant hard mask structure into a process for fabricating high density memory cells | Bharath Rangarajan, Stephan K. Park, Fei Wang, Dawn Hopper, Jack F. Thomas +2 more | 2002-11-26 |
| 6458677 | Process for fabricating an ONO structure | Dawn Hopper, Bharath Rangarajan | 2002-10-01 |
| 6436766 | Process for fabricating high density memory cells using a polysilicon hard mask | Bharath Rangarajan, Fei Wang, Dawn Hopper, Stephen Keetai Park, Jack F. Thomas +2 more | 2002-08-20 |
| 6410388 | Process for optimizing pocket implant profile by RTA implant annealing for a non-volatile semiconductor device | George Jonathan Kluth, Stephen Keetai Park, Arvind Halliyal | 2002-06-25 |
| 6406960 | Process for fabricating an ONO structure having a silicon-rich silicon nitride layer | Dawn Hopper, Bharath Rangarajan, Arvind Halliyal | 2002-06-18 |
| 6399480 | Methods and arrangements for insulating local interconnects for improved alignment tolerance and size reduction | William G. En, Darin A. Chan, Fei Wang, Minh Van Ngo | 2002-06-04 |
| 6399446 | Process for fabricating high density memory cells using a metallic hard mask | Bharath Rangarajan, Fei Wang, Dawn Hopper, Stephen Keetai Park, Jack F. Thomas +2 more | 2002-06-04 |
| 6395644 | Process for fabricating a semiconductor device using a silicon-rich silicon nitride ARC | Dawn Hopper, Minh Van Ngo | 2002-05-28 |
| 6380588 | Semiconductor device having uniform spacers | William G. En, Minh Van Ngo, Chih-Yuk Yang, Scott A. Bell, Olov Karlsson +1 more | 2002-04-30 |
| 6376308 | Process for fabricating an EEPROM device having a pocket substrate region | Fei Wang, Bharath Rangarajan, George J. Kluth | 2002-04-23 |
| 6365320 | Process for forming anti-reflective film for semiconductor fabrication using extremely short wavelength deep ultraviolet photolithography | Subhash Gupta | 2002-04-02 |
| 6313018 | Process for fabricating semiconductor device including antireflective etch stop layer | Fei Wang, Myron R. Cagan, Subhash Gupta | 2001-11-06 |
| 6297143 | Process for forming a bit-line in a MONOS device | Bharath Rangarajan, Fei Wang, Steven K. Park | 2001-10-02 |
| 6248635 | Process for fabricating a bit-line in a monos device using a dual layer hard mask | Hideki Komori, Bharath Rangarajan, Steven K. Park | 2001-06-19 |