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Steven K. Park — 11 Patents

AMD: 11 patents #1,112 of 9,280Top 15%
Fujitsu Limited: 1 patents #14,843 of 24,456Top 65%
Austin, TX: #2,975 of 18,064 inventorsTop 20%
Texas: #13,915 of 125,132 inventorsTop 15%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
Steven K. Park has been granted 11 US patents while listed as an inventor at AMD. The first was granted in 2001 and the most recent in April 2003. Steven K. Park ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Steven K. Park in Austin, TX, US.

Patents per Year

Patents granted per year, 2001 to 2003Bar chart with a peak of 8 patents in 2001.peak 82001: 8 patents20012002: 1 patents20022003: 2 patents2003

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6548336 Planarization of a polysilicon layer surface by chemical mechanical polish to improve lithography and silicide formation Steven C. Avanzino 2003-04-15 $2,272,000
6537881 Process for fabricating a non-volatile memory device Bharath Rangarajan, David K. Foote, Fei Wang 2003-03-25 $2,887,000
6346466 Planarization of a polysilicon layer surface by chemical mechanical polish to improve lithography and silicide formation Steven C. Avanzino 2002-02-12 $7,726,000
6326268 Method of fabricating a MONOS flash cell using shallow trench isolation Fei Wang, Bharath Rangarajan 2001-12-04 $4,361,000
6323516 Flash memory device and fabrication method having a high coupling ratio Larry Wang 2001-11-27 $5,286,000
6297143 Process for forming a bit-line in a MONOS device David K. Foote, Bharath Rangarajan, Fei Wang 2001-10-02 $2,425,000
6258669 Methods and arrangements for improved formation of control and floating gates in non-volatile memory semiconductor devices — 2001-07-10 $4,638,000
6248635 Process for fabricating a bit-line in a monos device using a dual layer hard mask David K. Foote, Hideki Komori, Bharath Rangarajan 2001-06-19 $7,293,000
6218227 Method to generate a MONOS type flash cell using polycrystalline silicon as an ONO top layer Arvind Halliyal, Hideki Komori 2001-04-17 $5,863,000
6207502 Method of using source/drain nitride for periphery field oxide and bit-line oxide Kenneth Wo-Wai Au, David K. Foote, Fei Wang, Bharath Rangarajan 2001-03-27 $5,495,000
6180538 Process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device using rapid-thermal-chemical-vapor-deposition Arvind Halliyal, Robert B. Ogle, Kenneth Wo-Wai Au 2001-01-30 $6,431,000

Frequent Collaborators

Bharath Rangarajan5 shared
Fei Wang4 shared
David K. Foote4 shared
Hideki Komori2 shared
Kenneth Wo-Wai Au2 shared
Arvind Halliyal2 shared

Nearby-Ranked Inventors

Ya-Ching Chang11
Hermann Lubbert11
Alexander WAITE11
Mehrad Mehr11
Matthew J. Purdey11
Nishtha Madaan11
Ian C. Richards11
Chad Huffman11
Lifeng Fan11