Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6380029 | Method of forming ono stacked films and DCS tungsten silicide gate to improve polycide gate performance for flash memory devices | Kent Kuohua Chang, John Jianshi Wang | 2002-04-30 |
| 6319775 | Nitridation process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device | Arvind Halliyal, Robert B. Ogle, Susan Kim | 2001-11-20 |
| 6309927 | Method of forming high K tantalum pentoxide Ta2O5 instead of ONO stacked films to increase coupling ratio and improve reliability for flash memory devices | Kent Kuohua Chang, David Chi | 2001-10-30 |
| 6274433 | Methods and arrangements for forming a floating gate in non-volatile memory semiconductor devices | Mark T. Ramsbey, Tuan Pham, Yu Sun | 2001-08-14 |
| 6265268 | High temperature oxide deposition process for fabricating an ONO floating-gate electrode in a two bit EEPROM device | Arvind Halliyal, Robert B. Ogle, Hideki Komori | 2001-07-24 |
| 6248628 | Method of fabricating an ONO dielectric by nitridation for MNOS memory cells | Arvind Halliyal, David K. Foote, Hideki Komori | 2001-06-19 |
| 6235586 | Thin floating gate and conductive select gate in situ doped amorphous silicon material for NAND type flash memory device applications | Kent Kuohua Chang, Hao Fang | 2001-05-22 |
| 6232630 | Light floating gate doping to improve tunnel oxide reliability | Mark T. Ramsbey, Tuan Pham, Yu Sun, David Chi | 2001-05-15 |
| 6218689 | Method for providing a dopant level for polysilicon for flash memory devices | Kent Kuohua Chang, Hao Fang | 2001-04-17 |
| 6207502 | Method of using source/drain nitride for periphery field oxide and bit-line oxide | David K. Foote, Steven K. Park, Fei Wang, Bharath Rangarajan | 2001-03-27 |
| 6204159 | Method of forming select gate to improve reliability and performance for NAND type flash memory devices | Kent Kuohua Chang, Yuesong He | 2001-03-20 |
| 6180538 | Process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device using rapid-thermal-chemical-vapor-deposition | Arvind Halliyal, Robert B. Ogle, Steven K. Park | 2001-01-30 |
| 6117730 | Integrated method by using high temperature oxide for top oxide and periphery gate oxide | Hideki Komori, Mark Ramsbey | 2000-09-12 |
| 6034394 | Methods and arrangements for forming a floating gate in non-volatile memory semiconductor devices | Mark T. Ramsbey, Tuan Pham, Yu Sun | 2000-03-07 |