MC

Mark S. Chang

AM AMD: 57 patents #107 of 9,279Top 2%
SL Spansion Llc.: 12 patents #65 of 769Top 9%
Fujitsu Limited: 3 patents #8,614 of 24,456Top 40%
FL Fujitsu Amd Semiconductor Limited: 1 patents #14 of 40Top 35%
HP HP: 1 patents #3,612 of 7,018Top 55%
📍 Sunnyvale, CA: #198 of 14,302 inventorsTop 2%
🗺 California: #4,640 of 386,348 inventorsTop 2%
Overall (All Time): #31,260 of 4,157,543Top 1%
68
Patents All Time

Issued Patents All Time

Showing 26–50 of 68 patents

Patent #TitleCo-InventorsDate
6787458 Polymer memory device formed in via opening Nicholas H. Tripsas, Matthew S. Buynoski, Suzette K. Pangrle, Uzodinma Okoroanyanwu, Angela T. Hui +7 more 2004-09-07
6773954 Methods of forming passive layers in organic memory cells Ramkumar Subramanian, Jane V. Oglesby, Sergey Lopatin, Christopher F. Lyons, James J. Xie +1 more 2004-08-10
6764929 Method and system for providing a contact hole in a semiconductor device Angela T. Hui, Chi Chang 2004-07-20
6764949 Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication Douglas J. Bonser, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Darin A. Chan +6 more 2004-07-20
6753247 Method(s) facilitating formation of memory cell(s) and patterned conductive Uzodinma Okoroanyanwu, Suzette K. Pangrle, Matthew S. Buynoski, Nicholas H. Tripsas, Ramkumar Subramanian +1 more 2004-06-22
6750127 Method for fabricating a semiconductor device using amorphous carbon having improved etch resistance Darin A. Chan, Chih-Yuh Yang, Lu You, Scott A. Bell, Srikanteswara Dakshina-Murthy +1 more 2004-06-15
6727195 Method and system for decreasing the spaces between wordlines Michael K. Templeton 2004-04-27
6642148 RELACS shrink method applied for single print resist mask for LDD or buried bitline implants using chemically amplified DUV type photoresist Kouros Ghandehari, Emmanuil H. Lingunis, Angela T. Hui, Scott A. Bell, Jusuke Ogura 2003-11-04
6638358 Method and system for processing a semiconductor device Lu You, Hao Fang 2003-10-28
6610580 Flash memory array and a method and system of fabrication thereof Maria C. Chan, Hao Fang, Mike Templeton 2003-08-26
6566230 Shallow trench isolation spacer for weff improvement Harpreet Sachar, Unsoon Kim, Chih-Yuh Yang, Jayendra D. Bhakta 2003-05-20
6515328 Semiconductor devices with reduced control gate dimensions Wenge Yang, Lewis Shen 2003-02-04
6509232 Formation of STI (shallow trench isolation) structures within core and periphery areas of flash memory device Unsoon Kim, Yider Wu, Chi Chang, Angela T. Hui, Yu Sun 2003-01-21
6486029 Integration of an ion implant hard mask structure into a process for fabricating high density memory cells David K. Foote, Bharath Rangarajan, Stephan K. Park, Fei Wang, Dawn Hopper +2 more 2002-11-26
6475847 Method for forming a semiconductor device with self-aligned contacts using a liner oxide layer Minh Van Ngo, Yu Sun, Fei Wang, Mark T. Ramsbey, Chi Chang +1 more 2002-11-05
6472327 Method and system for etching tunnel oxide to reduce undercutting during memory array fabrication King Wai Kelwin Ko, Hao Fang 2002-10-29
6448594 Method and system for processing a semiconductor device Maria C. Chan, Hao Fang, Lu You, King Wai Kelwin Ko 2002-09-10
6444539 Method for producing a shallow trench isolation filled with thermal oxide Yu Sun, Angela T. Hui, Yue-Song He, Tatsuya Kajita, Chi Chang +1 more 2002-09-03
6444530 Process for fabricating an integrated circuit with a self-aligned contact Hung-Sheng Chen, Unsoon Kim, Yu Sun, Chi Chang, Mark T. Ramsbey +4 more 2002-09-03
6445051 Method and system for providing contacts with greater tolerance for misalignment in a flash memory Hao Fang, King Wai Kelwin Ko, John Jianshi Wang, Michael K. Templeton, Lu You +1 more 2002-09-03
6436766 Process for fabricating high density memory cells using a polysilicon hard mask Bharath Rangarajan, David K. Foote, Fei Wang, Dawn Hopper, Stephen Keetai Park +2 more 2002-08-20
6431182 Plasma treatment for polymer removal after via etch Mohammad R. Rakhshandehroo, Angela T. Hui 2002-08-13
6420752 Semiconductor device with self-aligned contacts using a liner oxide layer Minh Van Ngo, Yu Sun, Fei Wang, Mark T. Ramsbey, Chi Chang +1 more 2002-07-16
6420224 Stepper alignment mark formation with dual field oxide process Tatsuya Kajita 2002-07-16
6399446 Process for fabricating high density memory cells using a metallic hard mask Bharath Rangarajan, David K. Foote, Fei Wang, Dawn Hopper, Stephen Keetai Park +2 more 2002-06-04